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ATERA
Altera Corporation
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| Part No. |
MAX7000 MAX7000S EPM7128E EPM7128S EPM7256E EPM7256S EPM7160S EPM7160SLC84-7 EPM7032 EPM7032LC44-10 EPM7032S EPM7032TC44-10 EPM7160E EPM7064 EPM7064S EPM7192E EPM7192S EPM7192SQC160-10 EPM7192SQC160-15 EPM7096 EPM7128SLC EPM7032AET EPM7064SLC EPM7128STC EPM7128SQC EPM7128SLC84-15 EPM7128STC100 EPM7064SLC44-10 EPM7032LC44-15 EPM7032LC44-12 EPM7032AETC44 EPM7128SQC160-15 EPM7128SLI84-10
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| OCR Text |
...zed modules (LPM), Verilog HDL, vhdl, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, and VeriBest Programming support - Altera's Master Programming Unit (MPU) ... |
| Description |
Programmable logic , 128 macrocells, 8 logic array blocks, 68 I/O pins, 10ns
MAX 7000 Programmable Logic Device Family
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| File Size |
453.49K /
62 Page |
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ETC[ETC]
Altera Corp
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| Part No. |
EP1K30 EP1K100 EP1K30QC208-3 EP1K30QC208-2 EP1K30QC208-1 EP1K10QC208-3 EP1K10QC208-2 EP1K10QC208-1 ACEX1K EP1K50 ACEX1 EP1K10
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| OCR Text |
...gnWare components, Verilog HDL, vhdl, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, VeriBest, and Viewlogic Notes (1), (2) 208-Pin PQFP
120 147 1... |
| Description |
From old datasheet system
Programmable Logic Family
Simple PLD - Datasheet Reference
Programmable Logic Device Family
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| File Size |
368.83K /
86 Page |
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it Online |
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Penz VHDL
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| Part No. |
JE360 JE310
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| OCR Text |
... ? by penz vhdl frankenstr. 16 d - 55299 nackenheim germany www.penz - vhdl.de free datasheet http://www.0pdf.com
penz vhdl je300 , je310 , je350 and je360 2 table of c ontents 1. the jpeg ... |
| Description |
(JE300 - JE360) JPEG Baseline Encoder IP-Core Users Manual
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| File Size |
400.72K /
45 Page |
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it Online |
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Cypress Semiconductor Corp.
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| Part No. |
CY7C344
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| OCR Text |
... functions ? warp2 ? low-cost vhdl compiler for cplds and plds ieee 1164-compliant vhdl available on pc and sun platforms ? warp3 ? vhdl synthesis viewlogic graphical user interface schematic capture (viewdraw?) vhdl simulation (vie... |
| Description |
Universal Synchronous EPLD(通用同步EPLD) 通用同步可编程逻辑器件（通用同步可编程逻辑器件
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| File Size |
95.64K /
6 Page |
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it Online |
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ETC[ETC]
Altera Corporation
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| Part No. |
EPF10K10 EPF10K100 EPF10K100A EPF10K10A EPF10K130V EPF10K20 EPF10K250A EPF10K30 EPF10K30A EPF10K40 EPF10K50 EPF10K50V EPF10K70 EPF10K30AQ EPF10K30AQC240-3 DSF10K
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| OCR Text |
...gnWare components, Verilog HDL, vhdl, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, VeriBest, and Viewlogic
Altera Corporation
3
FLEX 10K... |
| Description |
From old datasheet system
EMBEDDED PROGRAMMABLE LOGIC FAMILY
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| File Size |
814.40K /
138 Page |
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Lineage Power
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| Part No. |
MESC-PM1
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| OCR Text |
...h ready signal - available in vhdl source code format for ease of customization - can be customised by logic design solutions general description the mesc_pm1 function, implemented on a orca fpga, is to extend the functionnality alread... |
| Description |
Enhanced Services ControllerPerformance Monitor - 127 Connections(可执行检27个连接的增强型服务控制器)
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| File Size |
505.35K /
15 Page |
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it Online |
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Lineage Power
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| Part No. |
ATMUTOPIA
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| OCR Text |
...cost throu g h desi g n reuse n vhdl * source code for eas y desi g n inte g ration n orca -specific optimization, tailor-made for hi g h performance n ample desi g n flexibilit y usin g built-in interface and function options n verifi... |
| Description |
Slave Core V2.0(异步传输模式从属内核V2.0)
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| File Size |
103.95K /
2 Page |
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it Online |
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Price and Availability
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