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XC3100A -    High-density family of Field-Programmable Gate Arrays

XC3100A_8838236.PDF Datasheet


 Full text search :    High-density family of Field-Programmable Gate Arrays
 Product Description search :    High-density family of Field-Programmable Gate Arrays


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PART Description Maker
ISPLSI2064VE ISPLSI2064VE-100LB100 ISPLSI2064VE-10    3.3V In-System Programmable High Density SuperFAST?PLD
3.3VIn-SystemProgrammableHighDensitySuperFASTPLD
3.3V In-System Programmable High Density SuperFASTPLD EE PLD, 7 ns, PQFP44
CRYSTAL 16.0 MHZ 20PF SMD EE PLD, 13 ns, PQFP100
CRYSTAL 20.0 MHZ 20PF SMD
RES 180K-OHM 1% 0.063W 200PPM THK-FILM SMD-0402 TR-7-PA2MM
3.3V In-System Programmable High Density SuperFAST PLD
3.3V In-System Programmable High Density SuperFAST⑩ PLD
3.3V In-System Programmable High Density SuperFAST?/a> PLD
280 MHz 3.3V in-system prommable superFAST high density PLD
Lattice Semiconductor, Corp.
Lattice Semiconductor Corporation
LATTICE[Lattice Semiconductor]
ISPLSI2032VL ISPLSI2032VL-110LB49 ISPLSI2032VL-110 2.5VIn-SystemProgrammableSuperFASTHighDensityPLD
2.5V In-System Programmable SuperFAST⑩ High Density PLD
2.5V In-System Programmable SuperFAST High Density PLD
2.5V In-System Programmable SuperFASTHigh Density PLD EE PLD, 10 ns, PQFP48
2.5V In-System Programmable SuperFASTHigh Density PLD EE PLD, 10 ns, PQFP44
2.5V In-System Programmable SuperFASTHigh Density PLD EE PLD, 7.5 ns, PQFP44
2.5V In-System Programmable SuperFASTHigh Density PLD EE PLD, 5 ns, PQCC44
2.5V In-System Programmable SuperFASTHigh Density PLD EE PLD, 5 ns, PQFP44
LATTICE[Lattice Semiconductor]
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
SCFS12000 SCFS10000 SCFS2000 SCFS4000 SCFS6000 SCF 1.5 A, 4000 V, SILICON, RECTIFIER DIODE
FAST RECOVERY HIGH VOLTAGE RECTIFIER ASSEMBLY
High Voltage,High Density Fast Recovery Rectifier(反向电压4000V,温55℃时平均整流电流1.5A,高压,高密度,快速恢复整流器)
High Voltage,High Density Fast Recovery Rectifier(反向电压6000V,温5℃时平均整流电流1.5A,高压,高密度,快速恢复整流器)
High Voltage,High Density Fast Recovery Rectifier(反向电压12000V,温5℃时平均整流电流1.5A,高压,高密度,快速恢复整流器)
High Voltage,High Density Fast Recovery Rectifier(反向电压2000V,温5℃时平均整流电流1.5A,高压,高密度,快速恢复整流器)
High Voltage,High Density Fast Recovery Rectifier(反向电压10000V,温5℃时平均整流电流1.5A,高压,高密度,快速恢复整流器)
High Voltage,High Density Fast Recovery Rectifier(????靛?12000V锛?俯搴?5???骞冲??存??垫?1.5A,楂??锛??瀵?害锛?揩???澶??娴??)
Semtech Corporation
HDSOLDERCUP HDVERTICAL 780-M26-113R051 780-MYY-113 MALE-HIGH DENSITY
MALE-HIGH DENSITY-MACHINED CONTACTS-VERTICAL
List of Unclassifed Manufacturers
List of Unclassifed Man...
ISP844X ISP824 ISP814 ISP824X ISP814X IS814 IS824 6V, 50mA hihg density AC input phototransistor optically coupled isolator
HIGH DENSITY A.C. INPUT PHOTOTRANSISTOR OPTICALLY COUPLED ISOLATORS 高密度交流输入光电晶体管的光耦合隔离
RES 18K 1/10W 5% 0805 TF
Electronic Theatre Controls, Inc.
List of Unclassifed Manufacturers
ISOCOM
MACH211SP-12 MACH211SP-7JC MACH211SP-7VC MACH211SP RES 35.7K-OHM 1% 0.1W 100PPM THICK-FILM SMD-0603 5K/REEL-7IN-PA
SCREW MACHINE SLOTTED 6-32X3/4
High-Density EE CMOS Programmable Logic EE PLD, 16 ns, PQCC44
High-Density EE CMOS Programmable Logic 高密度电子工程CMOS可编程逻辑
Advanced Micro Devices, Inc.
ADVANCED MICRO DEVICES INC
STP80N03L-06 4881 N-Channel Enhancement Mode "Ultra High Density" Power MOS Transistor(N沟道增强模式高密度功率MOS晶体管) N沟道增强模式“超高密度”功率MOS晶体管(不适用沟道增强模式高密度功率马鞍山晶体管)
N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR
N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR
From old datasheet system
N - CHANNEL ENHANCEMENT MODE "ULTRA HIGH DENSITY" POWER MOS TRANSISTOR
STMicroelectronics N.V.
ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
SGS Thomson Microelectronics
M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
Renesas Electronics Corporation.
Renesas Electronics, Corp.
ISPLSI5512VE-155LF256 ISPLSI5512VE-155LB272 ISPLSI In-system programmable 3.3V SuperWIDE high density PLD. fmax 155 MHz, tpd 6.5 ns.
In-system programmable 3.3V SuperWIDE high density PLD. fmax 125 MHz, tpd 7.5 ns.
EE PLD, 10 ns, PBGA388
In-system programmable 3.3V SuperWIDE high density PLD. fmax 100 MHz, tpd 10 ns.
In-system programmable 3.3V SuperWIDE high density PLD. fmax 80 MHz, tpd 12 ns.
LATTICE SEMICONDUCTOR CORP
 
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