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CY7C1916JV18-300BZXI - 18-Mbit DDR-II SRAM 2-Word Burst Architecture

CY7C1916JV18-300BZXI_7843345.PDF Datasheet
 
Part No. CY7C1916JV18-300BZXI CY7C1916JV18-300BZC CY7C1916JV18-300BZI CY7C1916JV18-300BZXC CY7C1320JV18-300BZC CY7C1320JV18-300BZXC CY7C1320JV18-300BZI CY7C1320JV18-300BZXI
Description 18-Mbit DDR-II SRAM 2-Word Burst Architecture
File Size 407.82K  /  26 Page  

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Cypress Semiconductor

Homepage http://www.cypress.com/
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72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
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