| PART |
Description |
Maker |
| CY2PP3220AI CY2PP3220AIT CY2PP3220 |
Dual 1:10 Differential Clock/Data Fanout Buffer
Dual 1:10 Differential Clock / Data Fanout Buffer 2PP SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
|
CYPRESS[Cypress Semiconductor]
Cypress Semiconductor, Corp.
|
| CY2PP3210AI CY2PP3210AIT CY2PP3210 |
Dual 1:5 Differential Clock/Data Fanout Buffer
Dual 1:5 Differential Clock / Data Fanout Buffer
|
CYPRESS[Cypress Semiconductor]
|
| SY100EL29VZCTR SY100EL29V SY100EL29VZC |
5V/3.3V DUAL DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP w/SET AND RESET
|
MICREL[Micrel Semiconductor]
|
| SY100EL29V |
DUAL DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP WITH SET AND RESET
|
Micrel Semiconductor
|
| MC100EL29DW MC100EL29DWG MC100EL29DWR2 MC100EL29DW |
5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset
|
ONSEMI[ON Semiconductor]
|
| AND8090 AND8090D MC100H601 MC100H601FN MC10H106FN |
3.3V / 5V ECL Quad 2-Input Differential AND/NAND
5V ECL Low Impedance Driver
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER
8 Input Priority Encoder
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V Dual Differential LVPECL to LVTTL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
Triple 4-3-3-Input NOR Gate
9-Bit ECL-TTL Translator
AC Characteristics of ECL Devices
|
Motorola
ONSEMI[ON Semiconductor]
|
| NB4N840MMNR4G NB4N840MMNG NB4N840M |
3.3V 3.2Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination
|
ONSEMI[ON Semiconductor]
|
| NB6L295MNG NB6L295MNTXG |
LVPECL Dual Programmable Delay ACTIVE DELAY LINE, COMPLEMENTARY OUTPUT, QCC24
2.5V / 3.3V Dual Channel Programmable Clock/Data Delay with Differential LVPECL Outputs
|
ON Semiconductor
|
| NB3N108K NB3N108KMNR4G NB3N108KMNG |
3.3V Differential 1:8 Fanout Clock Data Driver
3.3V Differential 1:8 Fanout Clock and Data Driver with HCSL Outputs
|
ON Semiconductor
|
| MAX9320EUA-T MAX9320AEKA-T |
2.25 V to 3.8 V, 1:2 differential LVPECL/LVECL/HSTL clock and data driver
1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 9320 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
MAXIM - Dallas Semiconductor
Maxim Integrated Products, Inc.
|
| NB100ELT23LDR2 NB100ELT23LD NB100ELT23LDTR2G NB100 |
3.3V Dual Differential LVPECL to LVTTL Translator
From old datasheet system
3.3V Dual Differential LVPECL/LVDS to LVTTL Translator DUAL PECL TO TTL TRANSLATOR, TRUE OUTPUT, PDSO8
|
ONSEMI[ON Semiconductor]
|
| MT41J128M16HA-125 MT41J256M8JE-125 |
Differential bidirectional data strobe
|
Micron Technology
|
