| PART |
Description |
Maker |
| CAT64LC10ZJ CAT64LC10ZP CAT64LC10J-TE7 CAT64LC10J- |
18-Mbit QDR-II SRAM 4-Word Burst Architecture 18-Mbit DDR-II SRAM 2-Word Burst Architecture 36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 4-Mbit (256K x 18) Flow-Through Sync SRAM SPI串行EEPROM SPI Serial EEPROM SPI串行EEPROM
|
Analog Devices, Inc.
|
| UPD44325092BF5-E33-FQ1 PD44325092B-15 |
4M X 9 QDR SRAM, 0.45 ns, PBGA165 36M-BIT QDRTM II SRAM 2-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
| K7R321884M K7R321884M-FC16 K7R321884M-FC20 K7R3218 |
1Mx36 & 2Mx18 & 4Mx9 QDRTM II b2 SRAM 2Mx36 & 4Mx18 & 8Mx9 QDRTM II b2 SRAM 1Mx36 & 2Mx18 QDRTM II b4 SRAM
|
Samsung Electronic SAMSUNG[Samsung semiconductor]
|
| CAT64LC40ZJ CAT64LC40ZS CAT64LC40J-TE7 CAT64LC40J- |
72-Mbit QDR-II SRAM 2-Word Burst Architecture 72-Mbit QDR-II SRAM 4-Word Burst Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture SPI Serial EEPROM SPI串行EEPROM 72-Mbit QDR-II™ SRAM 2-Word Burst Architecture SPI串行EEPROM 72-Mbit QDR™-II SRAM 2-Word Burst Architecture
|
Analog Devices, Inc.
|
| CY7C1165V18 CY7C1163V18 CY7C1161V18 CY7C1176V18 CY |
18-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 9 QDR SRAM, 0.45 ns, PBGA165 18-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 18兆位的国防评估报告⑩- II SRAM字突发架构(2.5周期读写延迟 18-Mbit QDR??II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|
| R1Q4A3609ABG40RS0 R1Q6A3609ABG40RS0 R1Q3A3609ABG40 |
1M X 36 QDR SRAM, PBGA165 1M X 36 QDR SRAM, 0.45 ns, PBGA165 36-Mbit QDR?II SRAM 2-word Burst 36-Mbit QDR?⑸I SRAM 2-word Burst 36-Mbit QDR垄芒II SRAM 2-word Burst
|
http:// Renesas Electronics Corporation
|
| CY7C1310BV18-167BZC CY7C1314BV18 CY7C1910BV18 CY7C |
18-Mbit QDR垄芒-II SRAM 2 Word Burst Architecture 18-Mbit QDR??II SRAM 2 Word Burst Architecture 18-Mbit QDR?II SRAM 2 Word Burst Architecture
|
Cypress Semiconductor http://
|
| CY7C1426AV18 |
36-Mbit QDR-II SRAM 4-Word Burst Architecture(4字Burst结构,36-Mbit QDR-II SRAM)
|
Cypress Semiconductor Corp.
|
| CY7C1141V18 CY7C1145V18 CY7C1156V18 CY7C1143V18 CY |
18-Mbit QDRII SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 2M X 9 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp.
|
| CY7C1412V18-200BZCES CY7C1414V18-200BZCES CY7C1410 |
36-Mbit QDR-II SRAM 2-Word Burst Architecture 36-Mbit QDR-II SRAM 2-Word Burst Architecture 36-Mbit QDR-II(TM) SRAM 2-Word Burst Architecture
|
Cypress Semiconductor
|
| CY7C1568KV18-550BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|