| PART |
Description |
Maker |
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| MC100EP31 MC100EP31DG MC100EP31DR2G MC100EP31DTG M |
3.3V / 5V ECL D Flip−Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| MC100EL30-06 |
5V ECL Triple D Flip−Flop with Set and Reset
|
ON Semiconductor
|
| MC100LVEL29-D |
3.3V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
|
ON Semiconductor
|
| MC10H109FNR2 MC10H131 MC100EP140 MC100E155FN MC100 |
Dual 4-5-Input OR/NOR Gate
Dual Type D Master-Slave Flip-Flop
3.3V ECL Phase-Frequency Detector
5V ECL 6-Bit 2:1 Mux Latch
5V ECL Differential Data and Clock D Flip-Flop
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
ECL/TTL Clock Driver
3.3V / 5V 2-Input Differential AND/NAND
5V ECL 2:1 Multiplexer
3.3V / 5V ECL JK Flip Flop
3.3V ECL 1:4 ÷ 1/÷ 2 Clock Fanout Buffer
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
Dual 2-Bit Adder/Subtractor
|
ON Semiconductor
|
| MC100EP29 MC100EP29DTG MC100EP29DTR2G MC100EP29MNG |
3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset
|
ONSEMI[ON Semiconductor]
|
| MC100EP29DT MC100EP29DTR2 MC10EP29 MC10EP29DT MC10 |
From old datasheet system
3.3V / 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
|
ON Semiconductor
|
| MC100EP35DR2 MC100EP33D NB100LVEP17MN |
3.3V / 5V ECL JK Flip Flop
3.3V / 5V ECL ÷4 Divider
2.5 V / 3.3 V ECL Quad Differential Driver/Receiver
|
ON Semiconductor
|
| ECLSOIC8EVB NB6L16D MC100EL01D MC100EL04D MC100EL0 |
3.3V / 5V ECL JK Flip Flop
5V ECL 2-Input XOR/XNOR
5V ECL Divide by 2 Divider
Evaluation Board Manual for High Frequency SOIC 8
|
ONSEMI[ON Semiconductor]
|
| 74HC74DR2 74HC74DG |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
ON Semiconductor
|
| MC10EP3506 MC3100EP35DT MC3100EP35DTG MC100EP35 MC |
3.3V / 5V ECL JK Flip−Flop
|
ONSEMI[ON Semiconductor]
|
