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QL3006 - PLD Gate pASIC 3 FPGA Combining High Performance and High Density

QL3006_143910.PDF Datasheet


 Full text search : PLD Gate pASIC 3 FPGA Combining High Performance and High Density
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QL3006 PLD Gate pASIC 3 FPGA Combining High Performance and High Density
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Electronic Theatre Controls, Inc.
QL3025-0PQ208M QL3025-2PQ208M QL3012 QL3012-0PL84M 60,000 usable PLD gate pASIC3 FPGA combining high performance and high density.
40,000 usable PLD gate pASIC3 FPGA combining high performance and high density.
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pASIC3 FPGA Combining High Performance and High Density(高性能和高密度相结合的pASIC3现场可编程门阵列)
Electronic Theatre Controls, Inc.
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AT40K-FFT AT40K05LV AT40K20 AT40K20LV AT40K40 AT40 AT40K-FFT [Updated 8/98. 8 Pages] Fast fourier transform Intellectual Property Core for AT40K FPGAs
From old datasheet system
5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam.
20K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (5V)
20K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (3.3V)
40K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (5V)
10K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (5V)
10K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (3.3V)
5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (3.3V)
5K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (5V)
Atmel Corp
5962-9225201MXX 5962-9225203MXX 5962-9225203MYX 59 Serially Controlled, Low-Voltage, 8-Channel Dual 4-Channel Multiplexers 现场可编程门阵列(FPGA
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NXP Semiconductors N.V.
Vishay Intertechnology, Inc.
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AT22LV10 AT22LV10L AT22LV10L-30GM AT22LV10-20JL AT 500 gate low voltage PLD, low power, 24 and 28 pins, 3V
30NS, OTP, CERDIP, MIL TEMP(EPLD)
Low-voltage UV
From old datasheet system
AT22LV10(L) [Updated 8/99. 12 Pages] 500 gate low voltage PLD. standard & low power. 24 pins
OT PLD, 20 ns, PQCC28
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N/A
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