| PART |
Description |
Maker |
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| HMC749LC3C |
26 GHz, T FLIP-FLOP w/ RESET, PROGRAMMABLE OUTPUT VOLTAGE & POSITIVE SUPPLY
|
Hittite Microwave Corporation
|
| 5962F9863401V9A 5962F9863401VCC 5962F9863401VXC AC |
Radiation Hardened Hex D-Type Flip-Flop with Reset 辐射硬化六角D类触发器触发器的复位
RES 46.4K OHM MTL FILM .60W 1% T AC SERIES, HEX POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDFP16
Radiation Hardened Hex D-Type Flip-Flop with Reset AC SERIES, HEX POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP16
|
Intersil, Corp.
Intersil Corporation
|
| MC74HCT273 MC74HCT273A ON1520 MC74HCT273AN HCT273 |
Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs HCT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
From old datasheet system
|
Motorola Mobility Holdings, Inc.
Motorola, Inc.
MOTOROLA[Motorola, Inc]
|
| 74AUP1G74GT-G 74AUP1G74GF |
Low-power D-type flip-flop with set and reset; positive-edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| MC100EP131FAR2G |
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock; Package: 32 LEAD LQFP 7x7, 0.8P; No of Pins: 32; Container: Tape and Reel; Qty per Container: 2000 100E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQFP32
|
ON Semiconductor
|
| HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋（抗辐射双JK触发器）
From old datasheet system
Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| 74LV107 74LV107D 74LV107DB 74LV107N 74LV107PW 74LV |
CLP SINE LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| MC74HC109 ON1335 |
Dual J-K Flip-Flop with Set and Rest
From old datasheet system
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
Motorola, Inc
ON Semi
|
| MM74C74N MM74C74 MM74C74M MM74C74MX |
Dual D Flip-Flop; Package: SOIC; No of Pins: 14; Container: Tape & Reel CMOS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
From old datasheet system
Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| SY10EL31ZG SY10EL31ZITR SY10EL3105 SY10EL31ZGTR SY |
D FLIP-FLOP WITH SET AND RESET
|
MICREL[Micrel Semiconductor]
|
| SY100E131JYTR SY100E131JY SY10E131_06 SY100E131 SY |
4-BIT D FLIP-FLOP
4-BIT D FLIP-FLOP 10E SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC28
|
MICREL[Micrel Semiconductor]
Micrel Semiconductor, Inc.
|
