| PART |
Description |
Maker |
| TSOP7000SW1 |
IR Receiver for High Data Rate PCM at 455 kHz
|
Vishay
|
| 106414-1205 |
QSFP to MPO Quad Data Rate PSM4 Active Optical Cable, 40 Gbps Data Rate, 2dB Loss Budget, Cable Length 5.0m
|
Molex Electronics Ltd.
|
| 1064101200 |
QSFP to QSFP Quad Data Rate PSM4 Active Optical Cable, 40 Gbps Data Rate
|
Molex Electronics Ltd.
|
| IDT5T9050PGI IDT5T9050 |
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFERJR 2.5V的单数据传输速率1:5时钟缓冲器TERABUFFER⑩JR
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER⑩ JR
2.5V Single Data Rate 1:5 Clock Buffer Terabuffer Jr.
|
Integrated Device Technology, Inc.
IDT[Integrated Device Technology]
|
| K4D28163HD |
2M x 16Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
| 1064111050 |
QSFP to QSFP Fourteen Data Rate PSM4 Active Optical Cable, 56 Gbps Data Rate
|
Molex Electronics Ltd.
|
| GS8170DD36C-333 GS8170DD36C-250 GS8170DD36C-300 GS |
18Mb x2Lp CMOS I/O Double Data Rate SigmaRAM 512K X 36 STANDARD SRAM, 2.1 ns, PBGA209
18Mb 1x2Lp CMOS I/O Double Data Rate SigmaRAM 35.71x2Lp的CMOS的I / O双数据速率SigmaRAM
|
GSI Technology, Inc.
|
| W9725G6JB25I |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| M13S128324A-2M |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M14D2561616A-2E |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
| DSK4D263238D K4D263238D K4D263238D-QC40 K4D263238D |
1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL
|
SAMSUNG SEMICONDUCTOR CO. LTD.
Samsung Electronic
SAMSUNG[Samsung semiconductor]
|
| ADXRS646-EP |
High Stability, Low Noise Vibration Rejecting Yaw Rate Gyroscope Data Sheet (Rev 0, 10/2012)
|
Analog Devices
|
