| PART |
Description |
Maker |
| SI5316-B-GM |
PRELIMINARY DATA SHEET PRECISION CLOCK JITTER ATTENUATOR
|
Silicon Laboratories
|
| SI5315B-C-GM SI5315A-C-GM |
SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER
Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet
|
Silicon Laboratories
|
| CS5523 CDB5524 CDB5522 CDB5523 |
Evaluation Board and Software
CDB5521/22/23/24/28 Evaluation Board Data Sheet |DC Measurement|A/D Converters CDB5521/22/23/24/28评估板数据|直流测量| A / D转换
|
Cirrus Logic, Inc.
|
| DS2188 |
T1/CEPT Jitter Attenuator(T1/CEPT 抖动衰减 DATACOM, PCM JITTER ATTENUATOR, PDIP16
|
Maxim Integrated Products, Inc.
|
| FSO-1D |
Ultra Low Jitter. 超低抖动
50-330 MHz, ultra low jitter
|
Kyocera, Corp.
KSS[Kyocera Kinseki Corpotation]
American KSS
|
| ZL50073NBSP ZL50073 ZL50073GAC |
32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps)
From old datasheet system
32 K Channel Digital Switch with High Jitter Tolerance, SONET/SDH Clock Multiplier PLL
|
ZARLINK[Zarlink Semiconductor Inc]
|
| K4D26323RA-GC |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
| CY23EP05SXI-1T CY23EP05SXC-1HT CY23EP05SXI-1HT CY2 |
2.5 V or 3.3 V,10-220-MHz, Low Jitter, 5 Output Zero Delay Buffer
2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
Cypress Semiconductor, Corp.
|
| ICS002BI72L ICS843002I-72 843002BKI-72LF 843002BKI |
FEMTOCLOCKS VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR
FEMTOCLOCKS⑩ VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR
|
Integrated Device Technology
|
| ICS843002I-40 ICS43002A40 ICS843002AKI-40 ICS84300 |
175MHZ, FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR
175MHz, FemtoClock? VCXO Based SONET/SDH Jitter Attenuator
|
ICST[Integrated Circuit Systems]
|
| TLP3220 |
Measurement Instrument
|
Toshiba Semiconductor
|
