| PART |
Description |
Maker |
| M1026 M1025 M1025-1Z-125.0000 M1026-1Z-125.0000 M1 |
Frequency Translation PLL Family with automatic reference clock reselection, Loss of Lock indicator, & Hitless Switching
VCSO BASED CLOCK PLL WITH AUTOSWITCH
|
Integrated Circuit Systems, Inc.
ICST[Integrated Circuit Systems]
|
| M1040 M1040-11-155.5200 M1040-11-156.2500 M1040-11 |
VCSO BASED CLOCK PLL WITH AUTOSWITCH
|
Integrated Circuit Systems, Inc.
ICST[Integrated Circuit Systems]
|
| M2006-12 |
VCSO BASED FEC CLOCK PLL
|
Integrated Circuit System
|
| M1034 M1033 M1033-11-155.5200 M1034-11I156.2500 M1 |
VCSO Based Clock PLL with AutoSwitch
|
ICST[Integrated Circuit Systems]
|
| M1025 M1026 |
(M1025 / M1026) VCSO BASED CLOCK PLL
|
ICST
|
| M2006-02 M2006-12 |
VCSO BASED FEC CLOCK PLL / HITLESS SWITCHING OPTION
|
ICST[Integrated Circuit Systems]
ICSI[Integrated Circuit Solution Inc]
|
| MPC9993FA |
IC PLL/IDCS PLL CLK DVR 32-LQFP 9993 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
|
Integrated Device Technology, Inc.
|
| CY2SSTV857LFI-32 CY2SSTV857LFI-32T CY2SSTV857LFC-3 |
SSTV SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC40
SSTV SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 0.240 INCH, MO-153, TSSOP-48
Differential Clock Buffer/Driver DDR400/PC3200-Compliant
|
CYPRESS SEMICONDUCTOR CORP
Cypress Semiconductor, Corp.
|
| NB2308AC1DTR2 NB2308AC1HD NB2308AC1DTG NB2308AC1DG |
3.3V Eight Output Zero Delay Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3V Eight Output Zero Delay Buffer; Package: SOIC 16 LEAD; No of Pins: 16; Container: Rail; Qty per Container: 48 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3 V Zero Delay Clock Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
Rectron Semiconductor
|
| ICS8735-31I ICS8735I-31 ICS8735AYI-31LF ICS8735AYI |
8735 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 7 X 7 MM, 1.40 MM HEIGHT, LQFP-32
8735 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LQFP-32
Low Skew, Low Jitter 1-to-5, Differential-to-Zero Delay LVPECL Clock Generator (P)
From old datasheet system
|
Integrated Device Technology, Inc.
ICS
|
| MK9173 MK9173-01CS08 MK9173-01CS08T MK9173-01 MK91 |
9173 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
Video Genlock PLL
|
ICS
Integrated Circuit Systems
|
| ASM5I9774AG-52-ET ASM5I9774A ASM5I9774A-52-ER ASM5 |
Octal D-Type Flip-Flops With Clear 20-TSSOP -40 to 85 9774 SERIES, PLL BASED CLOCK DRIVER, 14 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer 9774 SERIES, PLL BASED CLOCK DRIVER, 14 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
