| PART |
Description |
Maker |
| HD74HC78 HD74HC78P |
Dual J-K Flip-Flops (with Preset/ Common Clear and Common Clock)
Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock)
FLIP-FLOP|DUAL|J/K TYPE|HC-CMOS|DIP|14PIN|PLASTIC
|
HITACHI[Hitachi Semiconductor]
|
| 74F109 I74F109D I74F109N N74F109D N74F109N 74F109_ |
Positive J-K positive edge-triggered flip-flops F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
From old datasheet system
Positive J-Knot positive edge-triggered flip-flops
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| UT54ACS109E |
Dual J-K Flip-Flops
|
Aeroflex Circuit Techno...
|
| MC10135 MC10135FN MC10135L MC10135P ON0571 |
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CFP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CDIP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Dual J-K Master-Slave Flip-Flop
PIN ASSIGNMENT
From old datasheet system
|
Motorola Mobility Holdings, Inc.
Motorola, Inc.
ONSEMI[ON Semiconductor]
|
| UT54ACS74 UT54ACTS74 |
Dual D Flip-Flops with Clear & Preset
|
Aeroflex Circuit Techno...
|
| UT54ACTS74E |
Dual D Flip-Flops with Clear and Preset
|
Aeroflex Circuit Techno...
|
| HD74HC74-15 |
Dual D-type Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
| HD74LVC74 |
Dual D-type Flip Flops with Preset and Clear
|
Hitachi Semiconductor
|
| HD74LVC74 HD74LVC74FPEL HD74LVC74TELL |
Dual D-type Flip Flops with Preset and Clear
|
Renesas Electronics Corporation
|
| RD74LVC74BFPEL RD74LVC74BTELL |
Dual D-type Flip Flops with Preset and Clear
|
Renesas Electronics Corporation
|
| HD74HC74FPEL HD74HC74TELL HD74HC74 HD74HC74P |
Dual D-type Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
