| PART |
Description |
Maker |
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
| 74HC74DR2 74HC74DR2G 74HC74D 74HC74 74HC74DTR2G 74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
Dual D Flip-Flop with Set and Reset(带设置和复位的双D触发 双D触发器的设置和复位（带设置和复位的双触发器）
|
ONSEMI[ON Semiconductor]
|
| 5962F9863201VCC 5962F9863201V9A 5962F9863201VXC AC |
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual J-K Flip-Flop with Set and Reset 辐射硬化的设置和复位JK触发
|
Intersil Corporation
Intersil, Corp.
|
| MC74VHCT574A MC74VHCT74A ON1761 MC74VHCT74AD MC74V |
From old datasheet system
Dual D-Type Flip-Flop with Set and Reset
OCTAL D-TYPE FLLP-FLOP WITH SET AND RESET
|
ON Semiconductor
Motorola
|
| SL74HC112 SL74HC112D SL74HC112N |
Dual J-K Flip-Flop with Set and Reset
|
System Logic Semiconduc...
SLS[System Logic Semiconductor]
|
| CD54AC113A CD54ACT112 CD54AC112 CD54ACT113A |
Dual J-K Flip-Flop with Set and Reset
Dual “J-K” Flip-Flop with Set and Reset
Dual “J-K?/a> Flip-Flop with Set and Reset
Dual “J-K Flip-Flop with Set and Reset
|
INTERSIL[Intersil Corporation]
|
| IN74ACT109N IN74ACT109 IN74ACT109D |
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
INTEGRAL[Integral Corp.]
|
| MC74VHCT74ADR2 MC74VHCT74ADR2G MC74VHCT74ADTR2 MC7 |
Dual D-Type Flip-Flop with Set and Reset
|
ON Semiconductor
|
| MMC4013 |
Dual "D" with set/reset capability
DUAL D TYPE FLIP FLOP 双D型触发器
|
Micro Electronics
Microelectronica
|
| HCTS74MS HCTS74D HCTS74DMSR HCTS74HMSR HCTS74K HCT |
Radiation Hardened Dual-D Flip-Flop with Set and Reset
|
INTERSIL[Intersil Corporation]
|
| SY100EL29V SY100EL29VZC SY100EL29VZG SY100EL29VZGT |
5V/3.3V DUAL DIFFERENTIAL DATA AND CLOCKD FLIP-FLOP w/SET AND RESET
|
Micrel Semiconductor
|
