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AM27C512 - 512 Kilobit (64 K x 8-Bit) CMOS EPROM 512千比特(64亩8位)的CMOS存储 512 Kilobit (64 K x 8-Bit) CMOS EPROM 64K X 8 UVPROM, 90 ns, CDIP28 Quad bistable latches 16-SOIC 0 to 70 512千比特(64亩8位)的CMOS存储 512 Kilobit (64 K x 8-Bit) CMOS EPROM 64K X 8 UVPROM, 120 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SOIC 0 to 70 64K X 8 UVPROM, 55 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SOIC 0 to 70 64K X 8 UVPROM, 250 ns, CDIP28 Octal D-type Transparent Latches with 3-state Outputs 20-SO 0 to 70 64K X 8 UVPROM, 200 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-PDIP 0 to 70 512千比特(64亩8位)的CMOS存储 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SSOP 0 to 70 64K X 8 UVPROM, 250 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SO 0 to 70 64K X 8 UVPROM, 70 ns, CDIP28 Octal D-type Transparent Latches with 3-state Outputs 20-PDIP 0 to 70 Quad bistable latches 16-PDIP 0 to 70 Octal D-type Transparent Latches with 3-state Outputs 20-SOIC 0 to 70

AM27C512_115766.PDF Datasheet

 
Part No. AM27C512 AM27C4096-55DC AM27C4096-55DCB AM27C4096-55DE AM27C4096-55DEB AM27C4096-55DI AM27C4096-55DIB AM27C4096-55JC AM27C4096-55JI AM27C4096-55PC AM27C4096-55PI AM27C4096-70DC AM27C4096-70DCB AM27C4096-70DE AM27C4096-70DEB AM27C4096-70DI AM27C4096-70DIB AM27C4096-70JC AM27C4096-70JI AM27C4096-70PC AM27C4096-70PI AM27C4096-90DC AM27C4096-90DCB AM27C4096-90DE AM27C4096-90DEB AM27C4096-90DI AM27C4096-90DIB AM27C4096-90JC AM27C4096-90JI AM27C4096-90PC AM27C4096-90PI
Description 512 Kilobit (64 K x 8-Bit) CMOS EPROM 512千比特(64亩8位)的CMOS存储
512 Kilobit (64 K x 8-Bit) CMOS EPROM 64K X 8 UVPROM, 90 ns, CDIP28
Quad bistable latches 16-SOIC 0 to 70 512千比特(64亩8位)的CMOS存储
512 Kilobit (64 K x 8-Bit) CMOS EPROM 64K X 8 UVPROM, 120 ns, CDIP28
Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SOIC 0 to 70 64K X 8 UVPROM, 55 ns, CDIP28
Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SOIC 0 to 70 64K X 8 UVPROM, 250 ns, CDIP28
Octal D-type Transparent Latches with 3-state Outputs 20-SO 0 to 70 64K X 8 UVPROM, 200 ns, CDIP28
Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-PDIP 0 to 70 512千比特(64亩8位)的CMOS存储
Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SSOP 0 to 70 64K X 8 UVPROM, 250 ns, CDIP28
Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SO 0 to 70 64K X 8 UVPROM, 70 ns, CDIP28
Octal D-type Transparent Latches with 3-state Outputs 20-PDIP 0 to 70
Quad bistable latches 16-PDIP 0 to 70
Octal D-type Transparent Latches with 3-state Outputs 20-SOIC 0 to 70

File Size 90.63K  /  12 Page  

Maker


ADVANCED MICRO DEVICES INC
Advanced Micro Devices, Inc.



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Part: AM27C512
Maker: AMD
Pack: DIP
Stock: Reserved
Unit price for :
    50: $0.92
  100: $0.88
1000: $0.83

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 Full text search : 512 Kilobit (64 K x 8-Bit) CMOS EPROM 512千比特(64亩8位)的CMOS存储 512 Kilobit (64 K x 8-Bit) CMOS EPROM 64K X 8 UVPROM, 90 ns, CDIP28 Quad bistable latches 16-SOIC 0 to 70 512千比特(64亩8位)的CMOS存储 512 Kilobit (64 K x 8-Bit) CMOS EPROM 64K X 8 UVPROM, 120 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SOIC 0 to 70 64K X 8 UVPROM, 55 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SOIC 0 to 70 64K X 8 UVPROM, 250 ns, CDIP28 Octal D-type Transparent Latches with 3-state Outputs 20-SO 0 to 70 64K X 8 UVPROM, 200 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-PDIP 0 to 70 512千比特(64亩8位)的CMOS存储 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SSOP 0 to 70 64K X 8 UVPROM, 250 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SO 0 to 70 64K X 8 UVPROM, 70 ns, CDIP28 Octal D-type Transparent Latches with 3-state Outputs 20-PDIP 0 to 70 Quad bistable latches 16-PDIP 0 to 70 Octal D-type Transparent Latches with 3-state Outputs 20-SOIC 0 to 70
 Product Description search : 512 Kilobit (64 K x 8-Bit) CMOS EPROM 512千比特(64亩8位)的CMOS存储 512 Kilobit (64 K x 8-Bit) CMOS EPROM 64K X 8 UVPROM, 90 ns, CDIP28 Quad bistable latches 16-SOIC 0 to 70 512千比特(64亩8位)的CMOS存储 512 Kilobit (64 K x 8-Bit) CMOS EPROM 64K X 8 UVPROM, 120 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SOIC 0 to 70 64K X 8 UVPROM, 55 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SOIC 0 to 70 64K X 8 UVPROM, 250 ns, CDIP28 Octal D-type Transparent Latches with 3-state Outputs 20-SO 0 to 70 64K X 8 UVPROM, 200 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-PDIP 0 to 70 512千比特(64亩8位)的CMOS存储 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SSOP 0 to 70 64K X 8 UVPROM, 250 ns, CDIP28 Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-SO 0 to 70 64K X 8 UVPROM, 70 ns, CDIP28 Octal D-type Transparent Latches with 3-state Outputs 20-PDIP 0 to 70 Quad bistable latches 16-PDIP 0 to 70 Octal D-type Transparent Latches with 3-state Outputs 20-SOIC 0 to 70


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