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  receiver buffer translator Datasheet PDF File

For receiver buffer translator Found Datasheets File :: 165    Search Time::1.64ms    
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    MPC824507 MPC8245LZU300D MPC8245LZU333D MPC8245EC MPC8245ECS02AD MPC8245LVV266D MPC8245LZU266D

Freescale Semiconductor, Inc
Part No. MPC824507 MPC8245LZU300D MPC8245LZU333D MPC8245EC MPC8245ECS02AD MPC8245LVV266D MPC8245LZU266D
OCR Text ...ge, dual universal asynchronous receiver/transmitter (DUART), memory controller, DMA controller, PIC interrupt controller, a message unit (a...buffer supply for PCI and standard Supply voltages for memory bus drivers CPU PLL supply voltage OVD...
Description MPC8245 Integrated Processor Hardware Specifications

File Size 437.22K  /  68 Page

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    830S21AMILFT 830S21AMILF ICS830S21I

Integrated Device Technology
Part No. 830S21AMILFT 830S21AMILF ICS830S21I
OCR Text ...t Zo = 50 nCLK LVDS receiver Figure 2C. HiPerClockS CLK/nCLK Input Driven by a 3.3V LVPECL Driver Figure 2D. HiPerClockS CLK/nCLK Input Driven by a 3.3V LVDS Driver 2.5V 3.3V 2.5V R3 120 Zo = 60 R4 120 2.5V 3.3V ...
Description 1-TO-1 2.5V, 3.3V DIFFERENTIAL-TOLVCMOS/LVTTL translator

File Size 635.05K  /  11 Page

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    ST2601B

Sitronix Technology Co., Ltd.
Part No. ST2601B
OCR Text ...rent DAC Universal Asynchronous receiver/Transmitter (UART) - Full-duplex operation - Baud rate generator with one digital PLL - Standard baud rates of 600 bps to 115.2 kbps - Both transmitter and receiver buffers supported - Direct glueles...
Description 8-bit Integrated Microcontroller

File Size 613.70K  /  35 Page

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    ST2602B

Sitronix Technology Co., Ltd.
Part No. ST2602B
OCR Text ...nt DAC n Universal Asynchronous receiver/Transmitter (UART) - Full-duplex operation - Baud rate generator with one digital PLL - Standard baud rates of 600 bps to 115.2 kbps - Both transmitter and receiver buffers supported - Direct glueles...
Description 8-bit Integrated Microcontroller

File Size 585.26K  /  34 Page

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    NB6VQ572M NB6VQ572MMNG NB6VQ572MMNR4G

ON Semiconductor
Part No. NB6VQ572M NB6VQ572MMNG NB6VQ572MMNR4G
OCR Text ... incorporates a fixed Equalizer receiver, which when placed in series with a Clock / Data path, will enhance the degraded signal transmitted across an FR4 backplane or cable interconnect. For applications that do not require Equalization, c...
Description Multi−Level Inputs w/ Internal Termination

File Size 1,255.01K  /  11 Page

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For receiver buffer translator Found Datasheets File :: 165    Search Time::1.64ms    
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