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Mosel Vitelic, Corp.
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| Part No. |
V43648S04VTG-10PC
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| OCR Text |
...h n all inputs, outputs are lvttl compatible n 4096 refresh cycles every 64 ms n serial present detect (spd) n sdram perform...3 6ns cl t rcd t rp t rc 3228clk 2227clk v43648s04vtg-10pc-01
2 v43648s04vtg-10p... |
| Description |
3.3 Volt 8M x 64 High Performance PC100 SDRAM Module with Unbuffered(3.3V 8M*64位高性能无缓冲器PC100 SDRAM模块)
3.3 Volt 8M x 64 High Performance PC100 SDRAM Module with Unbuffered(3.3V 8M*64浣???ц?????插?PC100 SDRAM妯″?)
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| File Size |
68.70K /
10 Page |
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it Online |
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AVAGO TECHNOLOGIES LIMI...
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| Part No. |
AFCT-701SDDZ-15
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| OCR Text |
...le) the afct-701sddz accepts an lvttl compatible trans- mit disable control signal input which shuts down the transmitter optical output. a...3) to control transmitter operation. the normal behavior of this feature is to reset a tx disabled... |
| Description |
SFP Transceiver
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| File Size |
195.50K /
20 Page |
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it Online |
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Integrated Device Techn...
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| Part No. |
8V34S208
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| OCR Text |
...rovides level translated lvcmos/lvttl outputs which are copies of the individual differential inputs clka and clkb. the propagation delay of...3.3v voltage supply ? -40c to 85c ambient operating temperature ? lead-free 32-lead vfqfn (rohs 6/6)... |
| Description |
Eight differential LVDS output pairs
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| File Size |
555.49K /
21 Page |
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it Online |
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Integrated Device Techn...
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| Part No. |
8V34S204
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| OCR Text |
...rovides level translated lvcmos/lvttl outputs which are copies of the individual differential inputs clka and clkb. the propagation delay of...3.3v voltage supply ? -40c to 85c ambient operating temperature ? lead-free 24-lead vfqfn (rohs 6/6)... |
| Description |
Four differential LVDS output pairs
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| File Size |
582.61K /
22 Page |
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it Online |
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Samsung Electronic
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| Part No. |
K4S560832D-NCL7C
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| OCR Text |
lvttl revision 0.0 may. 2002 * samsung electronics reserves the right to change products or specification without notice.
k4s560832d cmos...3.3v power supply ? lvttl compatible with multiplexed address ? four banks operation ? mrs c... |
| Description |
8M x 8bit x 4 banks synchronous DRAM LVTTL, 133MHz
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| File Size |
78.93K /
9 Page |
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it Online |
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Integrated Device Techn...
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| Part No. |
83115BRILF 83115BRILFT
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| OCR Text |
lvttl fanout buffer 83115i 83115i rev b 4/28/15 1 ?2015 integrated device technology, inc. general description the 83115i is a low skew, ...3.3v supply mode over the industrial temperature range. guaranteed output and part-to-part skew ch... |
| Description |
Low Skew, 1-to-16 LVCMOS/LVTTL Fanout Buffer
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| File Size |
154.06K /
11 Page |
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it Online |
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Integrated Device Techn...
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| Part No. |
IDT8T79S828I-08
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| OCR Text |
...ol port mode data input. lvcmos/lvttl interface levels. 2 miso output serial control port mode data output. lvcmos/lvttl interface levels. 3 nrst input pullup frequency divider reset. when the nrst is released (rising edge), the divided c... |
| Description |
1-to-8 Differential to Universal Output Clock Divider/Fanout Buffer
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| File Size |
444.28K /
28 Page |
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Mosel Vitelic, Corp.
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| Part No. |
V43644Y04VTG-10PC
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| OCR Text |
...pply n all device pins are lvttl compatible n 4096 refresh cycles every 64 ms n self-refresh mode n internal pipelined oper...3 clocks) description the v43644y04v(c)tg-10pc memory module is organized 4,194,304 x 64 bits in... |
| Description |
3.3 VOLT 4M x 64 HIGH PERFORMANCE 100 MHZ SDRAM UNBUFFERED SODIMM
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| File Size |
135.11K /
10 Page |
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it Online |
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Integrated Device Techn...
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| Part No. |
IDT8T79S818I-08
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| OCR Text |
...ol port mode data input. lvcmos/lvttl interface levels. 2 miso output serial control port mode data output. lvcmos/lvttl interface levels. 3 nrst input pullup frequency divider reset. when the nrst is released (rising edge), the divided c... |
| Description |
Four banks of two low skew outputs
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| File Size |
457.22K /
28 Page |
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it Online |
Download Datasheet |
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