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Fujitsu Media Devices
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| Part No. |
MB3793-30A
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| OCR Text |
...timer monitors Clock1 (CK1) and clock2 (CK2) pulses alternately. When a CK2 pulse is detected after detecting a CK1 pulse, the monitoring time setting capacity (CTW) switches to charging from discharging. DataSheet4U.com When two consecutiv... |
| Description |
POWER-VOLTAGE MONITORING IC WITH WATCHDOG TIMER
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| File Size |
419.77K /
24 Page |
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it Online |
Download Datasheet
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SGS Thomson Microelectronics
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| Part No. |
AN1146
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| OCR Text |
... low to high and again to low ( clock2 block), through port p8, to let the memory read the single bit data on the rising edge of scl clock signal pulse. the block bit_byte , written in assembler code for quick operations allows to send th... |
| Description |
I2C COMMUNICATION BETWEEN ST52X301 AND EEPROM
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| File Size |
215.85K /
14 Page |
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it Online |
Download Datasheet
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Hynix Semiconductor Inc.
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| Part No. |
GM82C765
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| OCR Text |
...tl level signal 21 clk2 clock2 i n ttl level clock input used for non - standard data rates is 9.6mhz for 300 kbs, and can only be selected from the control register. * xt2 (pin23) of 44 pin - plcc (condinued on next pa... |
| Description |
FLOPPY DISK SUBSYSTEM CONTROLLER
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| File Size |
226.89K /
36 Page |
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it Online |
Download Datasheet
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