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Part No.	CY7C1312AV18-167BZC
OCR Text	...am (cy7c1310av18) clk a (19:0) gen. k k control logic address register d [7:0] read add. decode read data reg. rps wps q [7:0] control logi...ii. in the single clock mode, cq is generated with respect to k. the timings for the echo clocks a...
Description	18-Mb QDR-II SRAM 2-Word Burst Architecture
File Size	311.00K / 21 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C14141KV18 CY7C14141KV18-300BZXC
OCR Text	...kv18) 2m x 8 array clk a (20:0) gen. k k control logic address register d [7:0] read add. decode read data reg. rps wps control logic addres...ii sram ........................... 20 power up sequence ............................................
Description	36-Mbit QDR? II SRAM 2-Word Burst Architecture
File Size	595.68K / 31 Page	View it Online	Download Datasheet

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Part No.	CY7C1312BV18-250BZC
OCR Text	...ram (cy7c1310bv18) clk a (19:0) gen. k k control logic address register d [7:0] read add. decode read data reg. rps wps q [7:0] control logi...ii comp letely eliminates the need to ?turn-around? the data bus and avoids any possible data conten...
Description	18-Mbit QDR-II SRAM 2-Word Burst Architecture
File Size	512.88K / 25 Page	View it Online	Download Datasheet

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Part No.	CY7C1515KV18-250BZXI CY7C1515KV18-300BZC CY7C1515KV18-250BZI CY7C1515KV18-250BZC CY7C1515KV18-250BZXC CY7C1513KV18-300BZC CY7C1513KV18-300BZXC CY7C1513KV18-250BZXI CY7C1526KV18-300BZXC
OCR Text	...kv18) 2m x 8 array clk a (20:0) gen. k k control logic address register d [7:0] read add. decode read data reg. rps wps control logic addres...ii sram ............................. 21 power up sequence ...........................................
Description	72-Mbit QDR II SRAM 4-Word Burst Architecture 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
File Size	493.97K / 33 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1248KV18 CY7C1248KV18-400BZC CY7C1248KV18-450BZXC CY7C1248KV18-400BZXC CY7C1250KV18-400BZI CY7C1250KV18-400BZC CY7C1246KV18 CY7C1250KV18-400BZXC CY7C1250KV18-450BZXC
OCR Text	...rite reg write reg clk a (20:0) gen. k k control logic address register read add. decode read data reg. r/w output logic reg. reg. reg. 8 16...ii+ sram ......................... 20 power up sequence .............................................
Description	36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
File Size	634.16K / 28 Page	View it Online	Download Datasheet

				Cypress Semiconductor, Corp. Cypress Semiconductor Corp.
Part No.	CY7C1312BV18-167BZXC CY7C1310BV18-167BZXC CY7C1314BV18-167BZXC CY7C1910BV18 CY7C1910BV18-167BZXC CY7C1310BV18-200BZC CY7C1310BV18-250BZC CY7C1910BV18-200BZC CY7C1910BV18-250BZC CY7C1314BV18-200BZC CY7C1314BV18-250BZC CY7C1312BV18-167BZC
OCR Text	...am (cy7c1310bv18) clk a (19:0) gen. k k control logic address register d [7:0] read add. decode read data reg. rps wps q [7:0] control logi...ii comp letely eliminates the need to ?turn-around? the data bus and avoids any possible data conten...
Description	18-Mbit QDR-II SRAM 2-Word Burst Architecture 1M X 18 QDR SRAM, 0.5 ns, PBGA165 18-Mbit QDR-II(TM) SRAM 2-Word Burst Architecture
File Size	261.59K / 23 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1276V18-375BZC CY7C1276V18-333BZC CY7C1276V18-375BZI CY7C1276V18-300BZI CY7C1276V18-333BZXI CY7C1276V18-300BZC CY7C1276V18-300BZXI CY7C1276V18-300BZXC CY7C1276V18-333BZXC CY7C1276V18-333BZI CY7C1263V18 CY7C1263V18-300BZC CY7C1263V18-300BZI CY7C1263V18-300BZXC CY7C1263V18-300BZXI CY7C1263V18-333BZC CY7C1263V18-333BZI CY7C1263V18-333BZXC CY7C1263V18-333BZXI CY7C1263V18-375BZC CY7C1263V18-375BZI CY7C1263V18-375BZXC CY7C1263V18-375BZXI CY7C1263V18-400BZC CY7C1263V18-400BZI CY7C1263V18-400BZXC CY7C1263V18-400BZXI CY7C1265V18-333BZC CY7C1261V18-333BZC CY7C1261V18-375BZC CY7C1265V18-375BZC CY7C1261V18-300BZI CY7C1265V18-300BZI CY7C1261V18-400BZI CY7C1265V18-400BZI CY7C1265V18-300BZC CY7C1261V18-300BZC CY7C1265V18-400BZC CY7C1276V18-400BZC CY7C1261V18-400BZC CY7C1276V18-375BZXC
OCR Text	...6v18) 1m x 8 array clk a (19:0) gen. k k control logic address register d [7:0] read add. decode read data reg. rps wps q [7:0] control logi...ii+. the timing for the echo clocks is shown in ?switching character- istics? on page 23 . cq echo ...
Description	36-Mbit QDR?II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
File Size	1,101.64K / 28 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C12761KV18 CY7C12631KV18 CY7C12651KV18 CY7C12611KV18
OCR Text	...am (cy7c12761kv18) clk a (19:0) gen. k k control logic address register d [7:0] read add. decode read data reg. rps wps control logic addres...ii+ sram ......................... 20 power-up sequence ..............................................
Description	36-Mbit QDR? II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
File Size	601.27K / 30 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1426AV18-300BZXI CY7C1426AV18-200BZXC CY7C1426AV18-200BZXI CY7C1426AV18-200BZC CY7C1426AV18-200BZI CY7C1411AV18-250BZC CY7C1411AV18-250BZI CY7C1411AV18-250BZXC CY7C1411AV18-250BZXI CY7C1411AV18-300BZC CY7C1411AV18-300BZI CY7C1411AV18-300BZXC CY7C1411AV18-300BZXI CY7C1411AV18-200BZXI CY7C1411AV18-167BZXC CY7C1411AV18-167BZXI CY7C1411AV18-167BZC CY7C1411AV18-167BZI CY7C1426AV18-278BZC CY7C1426AV18-278BZI CY7C1426AV18-278BZXC CY7C1426AV18-278BZXI CY7C1426AV18-250BZXC CY7C1426AV18-250BZXI CY7C1426AV18-167BZXC CY7C1426AV18-167BZXI CY7C1426AV18-300BZC CY7C1426AV18-300BZI CY7C1426AV18-300BZXC CY7C1426AV18 CY7C1413AV18-200BZXC CY7C1413AV18-250BZXC CY7C1413AV18-167BZC CY7C1413AV18-167BZI CY7C1413AV18-167BZXC CY7C1413AV18-167BZXI CY7C1413AV18-200BZC CY7C1413AV18-200BZI CY7C1413AV18-200BZXI CY7C1413AV18-250BZC CY7C1413AV18-250BZI CY7C1413AV18-250BZXI CY7C1415AV18-167BZI CY7C1415AV18-200BZC CY7C1415AV18-167BZXC CY7C1415AV18-167BZXI CY7C1415AV18-167BZC CY7C1415AV18-278BZC CY7C1411AV18-278BZC CY7C1413AV18-278BZC CY7C1413AV18-278BZI CY7C1411AV18-278BZXI CY7C1415AV18-278BZXI CY7C1413AV18-278BZXI
OCR Text	...y 1M x 8 Array K K CLK Gen. Control Logic RPS C C DOFF Read Data Reg. 32 Control Logic 16 Reg. 16 Reg. 8 Reg. CQ CQ ...II. In the single clock mode, CQ is generated with respect to K. The timings for the echo clocks are...
Description	36-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture 36-Mbit QDR??II SRAM 4-Word Burst Architecture 36-Mbit QDR?II SRAM 4-Word Burst Architecture
File Size	1,181.50K / 28 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1413BV18-300BZXC CY7C1413BV18-300BZXI CY7C1413BV18-250BZXC CY7C1413BV18-250BZXI CY7C1411BV18-300BZXC CY7C1411BV18-300BZXI CY7C1411BV18-167BZC CY7C1411BV18-167BZI CY7C1411BV18-167BZXC CY7C1411BV18-167BZXI CY7C1426BV18-300BZXC CY7C1426BV18-300BZXI CY7C1426BV18-278BZXC CY7C1426BV18-278BZXI CY7C1426BV18-250BZXC CY7C1426BV18-250BZXI CY7C1426BV18-250BZC CY7C1426BV18-250BZI CY7C1426BV18-167BZC CY7C1426BV18-167BZI CY7C1426BV18-167BZXC CY7C1426BV18-167BZXI CY7C1426BV18-200BZC CY7C1426BV18-200BZI CY7C1426BV18-200BZXC CY7C1426BV18-200BZXI CY7C1426BV18-278BZC CY7C1426BV18-278BZI CY7C1413BV18-300BZC CY7C1413BV18-300BZI CY7C1413BV18-278BZXC CY7C1413BV18-278BZXI CY7C1413BV18-200BZXC CY7C1413BV18-200BZXI CY7C1411BV18-278BZXC CY7C1411BV18-278BZXI CY7C1411BV18-278BZC CY7C1411BV18-278BZI CY7C1411BV18-250BZC CY7C1411BV18-250BZI CY7C1411BV18-250BZXC CY7C1411BV18-250BZXI CY7C1411BV18-200BZXC CY7C1411BV18-200BZXI CY7C1415BV18-300BZXC CY7C1415BV18-300BZXI CY7C1415BV18-278BZXC CY7C1415BV18-278BZXI CY7C1415BV18-200BZXC CY7C1415BV18-200BZXI CY7C1415BV18-278BZC CY7C1415BV18-278BZI CY7C1413BV18 CY7C1413BV18-167BZI CY7C1413BV18-200BZC CY7C1413BV18-167BZC CY7C1413BV18-167BZXC CY7C1413BV18-167BZXI CY7C1413BV1
OCR Text	...rray 1M x 8 Array K K CLK Gen. RPS Control Logic C C CQ DOFF Read Data Reg. 32 VREF WPS NWS[1:0] Control Logic 16 16 ...II. In the single clock mode, CQ is generated with respect to K. The timings for the echo clocks are...
Description	36-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture 36-Mbit QDR??II SRAM 4-Word Burst Architecture 36-Mbit QDR?II SRAM 4-Word Burst Architecture
File Size	450.55K / 30 Page	View it Online	Download Datasheet

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