| |
|
 |
ST Microelectronics
|
| Part No. |
STA001
|
| OCR Text |
...MP :363.625- 373.75
S a
IF1 BUFFER
e h
AGC1, AGC2 VGA
HSB2 High Speed Bipolar Technology for one chip solution for the Starman di...3V) ICC1 ICC2 Current supplied by VDD1 Current supplied by VDD2 Powered circuits: LNA, RF mixer, IF ... |
| Description |
RF FRONT-END FOR DIGITAL RADIO
|
| File Size |
177.71K /
20 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
ST Microelectronics
|
| Part No. |
STA002
|
| OCR Text |
... PAD Description CMOS Input Pad Buffer with Pull-Down Test Pin CMOS 2mA Output Driver
I I I O I/O I
Analog Pad Buffer Analog Pad Buffe...3V 0.3V; Tamb = 0 to 70C; Rg = 50 unless otherwise specified DC OPERATING CONDITIONS
Symbol VDD Tj ... |
| Description |
STARMANO CHANNEL DECODER
|
| File Size |
272.27K /
43 Page |
View
it Online |
Download Datasheet |
| |
|
|
ST Microelectronics
|
| Part No. |
STA013 STA013B
|
| OCR Text |
...CONFIG. & VOLUME CONTROL OUTPUT BUFFER PCM OUTPUT INTERFACE
9 10 11
SDO SCKT LRCKT
BUFFER
PARSER
SYSTEM & AUDIO CLOCKS
TES...3V; Tamb = 0 to 70C; Rg = 50 unless otherwise specified DC OPERATING CONDITIONS
Symbol VDD Power Su... |
| Description |
(STA013x) MPEG 2.5 LAYER III AUDIO DECODER
|
| File Size |
332.24K /
38 Page |
View
it Online |
Download Datasheet |
| |
|
|
Mosel Vitelic, Corp.
|
| Part No. |
V54C365404VD
|
| OCR Text |
...ense amplifier & i(o) bus input buffer output buffer i/o 1 -i/o 4 column address counter column address buffer row address buffer refresh co...3v on any of the input pins or vcc supplies. the clk signal must be started at the same time. after ... |
| Description |
HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 16M X 4 SYNCHRONOUS DRAM 4 BANKS X 4Mbit X 4 高性能143/133/125 MHz3.36米x 4同步DRAM 4银行XMb × 4
|
| File Size |
564.50K /
54 Page |
View
it Online |
Download Datasheet |
| |
|
|
Mosel Vitelic, Corp.
|
| Part No. |
V54C365804VD
|
| OCR Text |
...ense amplifier & i(o) bus input buffer output buffer i/o 1 -i/o 8 column address counter column address buffer row address buffer refresh co...3v on any of the input pins or vcc supplies. the clk signal must be started at the same time. after ... |
| Description |
HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 高性能143/133/125 MHz3.3米8同步DRAM 4银行X 2Mbit的8
|
| File Size |
563.57K /
54 Page |
View
it Online |
Download Datasheet |
| |
|
|
Xilinx, Inc.
|
| Part No. |
XA2C128-7CPG132I
|
| OCR Text |
...- tions that use an lvttl input buffer and push-pull output buffer. the lvcmos standard is used in 3.3v, 2.5v, 1.8v applications. ta b l e 1 : i/o standards for xa2c128 iostandard attribute output v ccio input v ccio lvttl 3.3 3.3 lvcm... |
| Description |
XA2C128-7CPG132I - NEW PRODUCT FLASH PLD, 7.5 ns, PBGA132
|
| File Size |
384.24K /
16 Page |
View
it Online |
Download Datasheet |
| |
|
|
IDT
|
| Part No. |
IDT5T93GL06
|
| OCR Text |
BUFFER TERABUFFER II
INDUSTRIAL TEMPERATURE RANGE
2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFERTM II
FEATURES:
* * * * * * * * * ...3V / 2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS input interface Selectable... |
| Description |
2.5V LVDS 1:6 Glitchless Clock Buffer Terabuffer II
|
| File Size |
109.79K /
16 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
