| |
|
 |
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| Part No. |
CY2509ZXC-1 CY25010 CY250911 CY2510ZXC-1 CY2510ZXC-1T
|
| OCR Text |
...1 q2 gnd gnd q3 q4 vdd oe fbout 1 2 3 4 5 6 7 8 9 10 11 12 cy2510 clk avdd vdd q8 q7 gnd gnd q6 q5 vdd oe5:8 fbin 24 23 22 21 20 19 18 17 16 15 14 13 agnd vdd q0 q1 q2 gnd gnd q3 q4 vdd oe0:4 fbout 1 2 3 4 5 6 7 8 9 10 11 12 cy2509
cy2509... |
| Description |
Spread Aware(TM), Ten/Eleven Output Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 40 MHz to 140 MHz; Outputs: 10; Operating Range: 0 to 70 C 2509 SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
Spread Aware? Ten/Eleven Output Zero Delay Buffer
Spread Aware(TM), Ten/Eleven Output Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 40 MHz to 140 MHz; Outputs: 11; Operating Range: 0 to 70 C 2510 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
Spread Aware(TM), Ten/Eleven Output Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 40 MHz to 140 MHz; Outputs: 11; Operating Range: 0 to 70 C
|
| File Size |
201.39K /
11 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Cypress Semiconductor, Corp.
|
| Part No. |
CY2302SC-1
|
| OCR Text |
...ce frequency?refer to ta b l e 1 to determine the specific option which meets your multiplication needs available in 8-pin soic package table 1. configuration options fbin fs0 fs1 out1 out2 out1 0 0 2 x ref ref out1 1 0 4 x ref 2 x re... |
| Description |
Frequency Multiplier and Zero Delay Buffer 2302 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
| File Size |
184.34K /
7 Page |
View
it Online |
Download Datasheet |
| |
|
|
Cypress Semiconductor, Corp.
|
| Part No. |
CY2305CSXA-1
|
| OCR Text |
...ine outputs, grouped as 4 + 4 + 1 (cy2309c) 50 ps typical cycle-to-cycle jitter (15 pf, 66 mhz) test mode to bypass phase locked loop (pll) (cy2309c) only, see select input decoding for cy2309c on page 5 available in space saving 16-pi... |
| Description |
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C 2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
| File Size |
424.74K /
17 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
