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Cypress Semiconductor, Corp.
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| Part No. |
CY2302SC-1
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| OCR Text |
...e same time as the input to the zdb. in order to achieve this, layout must compensate for trace length between the zdb and the target devices. the method of compensation is described as follows. external feedback is the trait t hat allows ... |
| Description |
Frequency Multiplier and Zero Delay Buffer 2302 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
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| File Size |
184.34K /
7 Page |
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it Online |
Download Datasheet
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Integrated Device Technology, Inc.
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| Part No. |
MK2308S-2ILFT
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| OCR Text |
...-2 zero delay, low skew buffer zdb idt? zero delay, low skew buffer 2 mk2308-2 rev e 051310 pin assignment feedback configuration table output clock mode select table pin descriptions 1 2 3 gnd 4 clka1 5 6 clka4 7 8 clka3 vdd clkb3 cl... |
| Description |
2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 0.150 INCH, ROHS COMPLIANT, SOIC-16
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| File Size |
137.42K /
6 Page |
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it Online |
Download Datasheet |
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Integrated Device Technology, Inc.
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| Part No. |
ICS9DB801CFLFT
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| OCR Text |
... select bypass(fan-out) or pll (zdb) mode 0 = bypass mode, 1= pll mode 23 sclk input clock pin of smbus circuitry, 5v tolerant. 24 sdata i/o data pin for smbus circuitry, 5v tolerant.
idt tm /ics tm eight output differential buffer f... |
| Description |
Eight Output Differential Buffer for PCI Express (50-200MHz) 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
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| File Size |
207.52K /
19 Page |
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it Online |
Download Datasheet |
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