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For submission Found Datasheets File :: 85    Search Time::1.938ms    
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    CYWB012X

Cypress Semiconductor
Part No. CYWB012X
OCR Text ...8 rev. ecn no. orig. of change submission date description of change ** 410919 qjl see ecn new release *a 460471 qjl, ruy see ecn updated pin table, pin diagram *b 2763925 ogc/aesa 09/1 5/09 added ordering information table *c 3282406 vs...
Description West Bridge Antioch

File Size 320.28K  /  9 Page

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    CY2DM1502 CY2DM1502ZXC

Cypress Semiconductor
Part No. CY2DM1502 CY2DM1502ZXC
OCR Text ...5 revision ecn orig. of change submission date description of change ** 2782891 cxq 10/09/09 new datasheet. *a 2838916 cxq 01/05/2010 changed status from ?advance? to ?preliminary?. changed from 0.34 ps to 0.25 ps maximum additive jitter...
Description 1:2 CML / LVPECL Input to CML Output Fanout Buffer

File Size 215.03K  /  12 Page

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    CY2XL11ZXC CY2XL11ZXCT

Cypress Semiconductor
Part No. CY2XL11ZXC CY2XL11ZXCT
OCR Text ...number: 001- 42886 rev. ecn no. submission date orig. of change description of change ** 2117527 see ecn wwz/kvm /aesa new data sheet *a 2669117 03/05/2009 kvm/ aesa changed crystal and output frequency removed msl spec changed iil value ...
Description 100 MHz LVDS Clock Generator Output frequency: 100 MHz

File Size 215.80K  /  9 Page

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    Cypress Semiconductor, Corp.
Part No. CY26580KQXI-2
OCR Text ...: 38-07536 rev. *c rev. ecn no. submission date orig. of change description of change ** 127357 06/17/03 rgl new data sheet *a 128564 09/12/03 ija change pin 1 to nc and pin 3 to clk *b 216828 see ecn rgl removed preliminary *c 2442066 se...
Description PacketClock&#153; Network Applications Clock 133.33 MHz, OTHER CLOCK GENERATOR, PDSO20

File Size 156.50K  /  6 Page

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    CY2XP22 CY2XP2211 CY2XP22ZXI CY2XP22ZXCT CY2XP22ZXIT

Cypress Semiconductor
Part No. CY2XP22 CY2XP2211 CY2XP22ZXI CY2XP22ZXCT CY2XP22ZXIT
OCR Text ...9 revision ecn orig. of change submission date description of change ** 506262 rgl see ecn new data sheet *a 838060 rgl see ecn changed status from advance to preliminary *b 2700242 kvm/pyrs 04/30/2009 reformatted revised phase noise val...
Description Crystal to LVPECL Clock Generator One LVPECL output pair

File Size 206.36K  /  10 Page

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    HC230 HC210W

Altera Corporation
Part No. HC230 HC210W
OCR Text ...s from the date of your design submission support for instant-on or instant-on-after-50-ms power-up modes preserves the design functionalit y of a stratix ii fpga prototype 1,000,000 to 3,600,000 usable gates fo r both logic and dsp fun...
Description HardCopy II Device Family

File Size 2,998.27K  /  228 Page

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    CY2410-5 CY2410-1

Cypress Semiconductor
Part No. CY2410-5 CY2410-1
OCR Text ...t number: 38-07317 rev. ecn no. submission date orig. of change description of change ** 111553 02/12/02 ckn new data sheet *a 114937 09/24/02 ckn added -6 to data sheet, advance information to final *b 121418 12/06/02 ckn updated the pul...
Description MPEG Clock Generator with VCXO Integrated phase-locked loop (PLL)

File Size 345.39K  /  13 Page

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    Cypress Semiconductor, Corp.
Part No. CY27022SXCT
OCR Text ...t number: 38-07293 rev. ecn no. submission date orig. of change description of change ** 116146 08/14/02 osm new data sheet *a 122884 12/22/02 rbi added power up requirements to maximum ratings *b 406494 see ecn xht/cft obsolete specifica...
Description PREMIS(TM):SSCG EMI Reduction; VDD: 3.3 V; Input Frequency: 16.9344 MHz; Output Frequency: 12 MHz to 180.6336 MHz; # Out: 3 180.6336 MHz, OTHER CLOCK GENERATOR, PDSO8

File Size 156.53K  /  4 Page

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    CY230012 CY2300SXCT

Cypress Semiconductor
Part No. CY230012 CY2300SXCT
OCR Text ...07252 rev. ecn orig. of change submission date description of change ** 110517 szv 01/07/02 change from spec number: 38-01039 to 38-07252 *a 121854 rbi 12/14/02 power up requirements added to operating conditions information *b 246829 rg...
Description Phase-Aligned Clock Multiplier
   Phase-Aligned Clock Multiplier

File Size 327.51K  /  9 Page

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