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Integrated Device Techn...
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| Part No. |
843002I-41
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| OCR Text |
...is needed. the device contains two internal pll stages that are cascaded in series. the first pll stage uses a vcxo which is optimized to ...pin assignment ics843002i-41 32-lead vfqfn 5mm x 5mm x 0.925mm package body k package top view 9 10 ... |
| Description |
700MHZ, FemtoClock VCXO Based Sonet/SDH Jitter Attenuators
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| File Size |
320.60K /
24 Page |
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it Online |
Download Datasheet
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Integrated Device Techn...
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| Part No. |
72255LA10PFG8 72255LA10PFGI8 72255LA10TFG8
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| OCR Text |
...each flag can default to one of two preselected offsets ? ? ? ? ? program partial flags by either serial or parallel means ? ? ? ? ? select ...pin thin quad flat pack (tqfp) and the 64- pin slim thin quad flat pack (stqfp) ? ? ? ? ? high-perfo... |
| Description |
CMOS SuperSync FIFO
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| File Size |
480.40K /
27 Page |
View
it Online |
Download Datasheet
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