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Samsung Electronic
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| Part No. |
M368L0914BT1
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| OCR Text |
... data width of this assembly 64 bits 40h 7 .........data width of this assembly - 00h 8 vddq and interface standard of this assembly sstl 2.5v 04h 9 ddr sdram cycle time at cas latency =2.5 8ns 7.5ns 7ns 80h 75h 70h 2 10 ddr sdram access t... |
| Description |
8M x 64 DDR SDRAM 184pin DIMM based on 8mx16 Serial Presence Detect
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| File Size |
21.39K /
3 Page |
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it Online |
Download Datasheet
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ProMOS Technologies
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| Part No. |
V58C2512164SB
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| OCR Text |
...ecture that prefetches multiple bits and then synchronizes the output data to a system clock. all of the control, address, circuits are syn...8mx16, 4k : 12816 16mx8, 4k : 12880 64mx4, 8k : 25640 16mx16, 8k : 25616 temperature 32mx8, 8k : 256... |
| Description |
High Performance 512M-Bit DDR SDRAM
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| File Size |
1,010.47K /
61 Page |
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it Online |
Download Datasheet
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ProMOS Technologies
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| Part No. |
V58C2256804SC
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| OCR Text |
...ecture that prefetches multiple bits and then synchronizes the output data to a system clock. all of the control, address, circuits are syn...8mx16, 4k : 12816 16mx8, 4k : 12880 64mx4, 8k : 25640 16mx16, 8k : 25616 temperature 32mx8, 8k : 256... |
| Description |
256 Mbit DDR SDRAM
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| File Size |
1,050.91K /
61 Page |
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it Online |
Download Datasheet
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Mosel Vitelic, Corp.
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| Part No. |
V55C2128164VT V55C2128164VB
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| OCR Text |
...ecture that prefetches multiple bits and then synch ronizes the output data to a system clock all of the control, address, data input and output circuits are synchronized with the positive edge of an ex- ternally supplied clock. operating t... |
| Description |
128Mbit LOW-POWER SDRAM 2.5 VOLT, TSOP II / BGA PACKAGE 8M X 16
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| File Size |
522.22K /
44 Page |
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it Online |
Download Datasheet
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Mosel Vitelic, Corp.
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| Part No. |
V55C2128164V
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| OCR Text |
...ecture that prefetches multiple bits and then synch ronizes the output data to a system clock all of the control, address, data input and output circuits are synchronized with the positive edge of an ex- ternally supplied clock. operating t... |
| Description |
128Mbit LOW-POWER SDRAM 2.5 VOLT, TSOP II / BGA PACKAGE 8M X 16
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| File Size |
525.77K /
44 Page |
View
it Online |
Download Datasheet
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