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Xilinx
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| Part No. |
XCV100-4BG256C
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| OCR Text |
...8 36 Chip-to-Chip HSTL Class IV LVTTL,16mA, fast slew 200 MHz 180 MHz 16 64 8x8 16 x 16 16 64 5.0 ns 7.2 ns 5.1 ns 6.0 ns 4.4 ns 6.4 ns 5.4 ns 4.1 ns 5.0 ns 6.9 ns Bits Virtex -6
Higher Performance
Virtex devices provide better performa... |
| Description |
IC,FPGA,2700-CELL,CMOS,BGA,256PIN,PLASTIC
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| File Size |
476.40K /
76 Page |
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it Online |
Download Datasheet
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Atmel, Corp.
Atmel Corp.
ATMEL[ATMEL Corporation]
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| Part No. |
256 600 120 ATL25_432 ATL25 ATL25_976 ATL25_100 ATL25_120 ATL25_132 ATL25_144 ATL25_160 ATL25_184 ATL25_208 ATL25_228 ATL25_256 ATL25_304 ATL25_388 ATL25_44 ATL25_484 ATL25_540 ATL25_600 ATL25_68 ATL25_700 ATL25_800 ATL25_84 ATL25_900 ATL25_352 ATL25/132 ATL25/208 ATL25/388 ATL25/432 ATL25/540 ATL25/976 ATL25/120 ATL25/800 ATL25/100 ATL25/184 ATL25/228 ATL25/352 ATL25/84 ATL25/256 ATL25/68 ATL25/700 ATL25/484 ATL25/304 ATL25/600 ATL25/900 ATL25/144 ATL25/160 ATL25/44
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| OCR Text |
...d Flash - I/O Interfaces: CMOS, LVTTL, LVDS, PCI, USB; Output Currents up to 16 mA @2.5V; 2.5V Native I/O, 3.3V Tolerant/Compliant I/O, 5.0V...SRAM). Among the peripheral options offered are: UART, 8-bit timer/counter, 16-bit timer/counter, pr... |
| Description |
ASIC 专用集成电路
From old datasheet system
The ATL25 series gate array and embedded array families from Atmel are fabricated on a 0.25 micron CMOS process with 5 levels of metal. This family features arrays with up to 6.9 million routable gates and 976 pins. The high density and hi
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| File Size |
217.07K /
14 Page |
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it Online |
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Galvantech
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| Part No. |
GVT71256B36 GVT71512B18 71256B36
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| OCR Text |
...rom the device. JTAG inputs use LVTTL/LVCMOS levels to shift data during this testing mode of operation. The TA package version does not off...SRAM family employs high-speed, low power CMOS designs using advanced triple-layer polysilicon, doub... |
| Description |
256K X 36/512K X 18 SYNCHRONOUS SRAM
From old datasheet system
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| File Size |
255.58K /
25 Page |
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it Online |
Download Datasheet |
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Galvantech
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| Part No. |
GVT71256C36 GVT71512C18 71256C36
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| OCR Text |
...rom the device. JTAG inputs use LVTTL/LVCMOS levels to shift data during this testing mode of operation. The TA package version does not off...SRAM family employs high-speed, low power CMOS designs using advanced triple-layer polysilicon, doub... |
| Description |
256K X 36/512K X 18 SYNCHRONOUS SRAM
From old datasheet system
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| File Size |
255.50K /
25 Page |
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it Online |
Download Datasheet |
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Price and Availability
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