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DATA DEVICE CORP
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| Part No. |
SDC-630-ST-I-3
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| OCR Text |
...ial order, consult factory) ttl/cmos compatible logic ?0? inhibits does not interrupt converter tracking. ttl/cmos natural binary angle; pos...3.3 v per rps (nominal) 10 v = 2.7 rps table 1. sdc-630/632/634 a/st specifications (contd) paramete... |
| Description |
SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, DMA27
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| File Size |
96.18K /
8 Page |
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| Part No. |
IBM0436A41BLAB-3
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| OCR Text |
... 18 organizations ? 0.25 micron cmos technology ? synchronous pipeline mode of operation with self-timed late write ? single differential hs...3 of 25 pin description sa0-sa18 address input sa0-sa18 for 512k x 18 sa0-sa17 for 256k x 36 sa0-sa1... |
| Description |
128K X 36 STANDARD SRAM, 1.7 ns, PBGA119
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| File Size |
142.68K /
25 Page |
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it Online |
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Cypress Semiconductor, Corp.
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| Part No. |
CY26049ZC-3 CY26049ZC-3T
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| OCR Text |
...e) VOL = 0.5, VDD = 3.3V (sink) CMOS Levels CMOS Levels VIH=VDD VIL=0V
Min. 12 12 0.7 - - - - -
Typ. 24 24 - - 5 5 - -
Max. - - - 0.3 10 10 7 30
Unit mA mA VDD VDD A A pF mA
AC Electrical Specifications (Commercial Temp: 0 to... |
| Description |
4.096 MHz, OTHER CLOCK GENERATOR, PDSO16 4.4 MM, 1.10 MM HEIGHT, TSSOP-16 FailSafeTM PacketClockTM Global Communications Clock Generator
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| File Size |
50.39K /
6 Page |
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it Online |
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Price and Availability
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