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  3-fifo Datasheet PDF File

For 3-fifo Found Datasheets File :: 9037    Search Time::3.11ms    
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    0804-5000A50 0804-5000A51 0804-5000E50 0804-5000E51

Bel Fuse Inc.
Part No. 0804-5000A50 0804-5000A51 0804-5000E50 0804-5000E51
OCR Text ...d config rgmii mii reset 3.3v dc ram pll sys clk dc / dc 2.5 v powerline module phy device or mac co...fifo is 2 kb and the receive fifo is 16 kb. when operat ing as a phy controller, the transmit ...
Description Powerline Modules

File Size 1,566.65K  /  18 Page

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    0804-5000-25

Bel Fuse Inc.
Part No. 0804-5000-25
OCR Text ...c 2 vss 27 reserved (n.c.) 3 vdd 28 reserved (required connection to ground) 4 vss 29 vss 5 vdd 30 mrx_d0 6 tx+ 31 mrx_d...fifo is 2 kb and the receive fifo is 8 kb. when operatin g as a phy controller, the mii transmit fi...
Description Industrial Powerline Module

File Size 713.70K  /  11 Page

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    IA186ES

InnovASIC, Inc
Part No. IA186ES
OCR Text ...i read line - pci 5.0v and 3.3v environments multiple interrupt sources contains two independent 3k fifos to minimize extern...fifo?s are contained on - chip so no additional on board memory is required. the ia21140af includes...
Description PCI FAST ETHERNET LAN CONTROLLER

File Size 97.99K  /  19 Page

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    MT8952B-1 MT8952BE MT8952BP MT8952BS

Mitel Semiconductor
MITEL[Mitel Networks Corporation]
Part No. MT8952B-1 MT8952BE MT8952BP MT8952BS
OCR Text ...e 1 - Functional Block Diagram 3-61 MT8952B ISO-CMOS TxCEN RxCEN CDSTo CDSTi WD IRQ A0 A1 A2 A3 CS E R/W VSS 1 2 3 4 5 6 7 8 9 ...FIFO Status Receive Data Control Receive Address C-Channel Control (Transmit) Timing Control Interru...
Description ISO-CMOS ST-BUS FAMILY HDLC Protocol Controller
ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller

File Size 169.67K  /  27 Page

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    MT8952 MT8952B MT8952BC MT8952BS MT8952BE MT8952BP

Mitel Semiconductor
MITEL[Mitel Networks Corporation]
Part No. MT8952 MT8952B MT8952BC MT8952BS MT8952BE MT8952BP
OCR Text ...e 1 - Functional Block Diagram 3-61 MT8952B ISO-CMOS TxCEN RxCEN CDSTo CDSTi WD IRQ A0 A1 A2 A3 CS E R/W VSS 1 2 3 4 5 6 7 8 9 ...FIFO Status Receive Data Control Receive Address C-Channel Control (Transmit) Timing Control Interru...
Description ISO-CMOS ST-BUS FAMILY HDLC Protocol Controller
ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller

File Size 160.74K  /  22 Page

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    ST16C650 ST16C650A ST16C650ACJ44 ST16C650ACP40 ST16C650ACQ48 ST16C650AIJ44 ST16C650AIP40 ST16C650AIQ48

EXAR[Exar Corporation]
Part No. ST16C650 ST16C650A ST16C650ACJ44 ST16C650ACP40 ST16C650ACQ48 ST16C650AIJ44 ST16C650AIP40 ST16C650AIQ48
OCR Text ...ting up to serial data rates of 3.125 Mbps at 5 volt supply voltage. The internal registers include the 16C550 register set plus Exar's enha...FIFO A2:A0 Transmitter D7:D0 IOR# IOR IOW# IOW CS2# CS1 CS0 INT TXRDY# RDRDY# DDIS# BRG Prescaler SE...
Description 2.90V TO 5.5V UART WITH 32-BYTE FIFO

File Size 354.51K  /  53 Page

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    ST16C654 ST16C654CJ68 ST16C654CQ100 ST16C654CQ64 ST16C654D ST16C654DCQ64 ST16C654DIQ64 ST16C654IJ68 ST16C654IQ100 ST16C6

EXAR[Exar Corporation]
Part No. ST16C654 ST16C654CJ68 ST16C654CQ100 ST16C654CQ64 ST16C654D ST16C654DCQ64 ST16C654DIQ64 ST16C654IJ68 ST16C654IQ100 ST16C654IQ64
OCR Text ... RW QLS WFHQQR& HGR 0 DORURWR0 3)4 QLS &76 &&9 RW QLS WFHQQR& HGR0 OHWQ, 3)4 QLS &76 &6 7 5 &7 1, &6& &; 7 52, '; ...FIFO FIGURE 3. PIN OUT ASSIGNMENT FOR PLCC PACKAGES IN 16 AND 68 MODE AND TQFP PACKAGES / (6 7...
Description 2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO

File Size 653.82K  /  51 Page

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    74ACT2708 74ACT2708PC

FAIRCHILD[Fairchild Semiconductor]
Part No. 74ACT2708 74ACT2708PC
OCR Text ...allowing the data outputs to be 3-STATE. Input Ready (IR) and Output Ready (OR) signal when the FIFO is ready for I/O operations. The status flags HF and FULL indicate when the FIFO is full, empty or half full. The FIFO can be expanded to p...
Description 64 x 9 First-In/ First-Out Memory
From old datasheet system
64 x 9 First-In, First-Out Memory

File Size 93.75K  /  13 Page

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