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Cypress Semiconductor Corp.
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| Part No. |
W152
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| OCR Text |
...e same time as the input to the zdb. In order to achieve this, layout must compensate for trace length between the zdb and the target devices. The method of compensation is described below. External feedback is the trait that allows for thi... |
| Description |
Spread Aware Eight Output Zero Delay Buffer( 八输出零延迟缓冲
From old datasheet system
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| File Size |
144.71K /
7 Page |
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Cypress Semiconductor Corp.
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| Part No. |
W217
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| OCR Text |
...is compensation. The PLL on the zdb will cause the feedback signal to be in phase with the reference signal. When laying out the board, match the trace lengths between the output being used for feed back and the FBIN input to the PLL. If it... |
| Description |
Spread Aware Eight Output Zero Delay Buffer( 八输出零延迟缓冲
From old datasheet system
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| File Size |
93.75K /
5 Page |
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CYPRESS[Cypress Semiconductor]
Cypress Semiconductor Corp.
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| Part No. |
CY2510ZC-1 CY2509ZC-1 CY2510 CY2509
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| OCR Text |
...Reference clock provided to the zdb goes HIGH. Synchronizing the other outputs of the zdb to the outputs form the ASIC/Buffer is more complex however, as any propagation delay in the ASIC/Buffer must be accounted for.
Reference Signal Feed... |
| Description |
Spread Aware(TM), Ten/Eleven Output Zero Delay Buffer
Spread Aware, Ten/Eleven Output Zero Delay Buffer
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| File Size |
99.90K /
6 Page |
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Integrated Circuit Syst...
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| Part No. |
9DBV0441
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| OCR Text |
zdb/fob w/zo=100ohm 9dbv0441 description the 9dbv0441 is a member of idt's soc-friendly 1.8v very-low-power (vlp) pcie family. it has integrated output terminations providing zo=100ohms for direct connection to 100ohm transmission lines... |
| Description |
53mW typical power consumption in PLL mode
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| File Size |
207.64K /
17 Page |
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Integrated Device Techn...
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| Part No. |
ICS670-03
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| OCR Text |
...hase noise, zero delay buffer (zdb) which integrates idt?s proprietary analog/digital phase locked loop (pll) techniques. it is identical to the ics670-01, but with an increased maximum output frequency of 210 mhz. part of idt?s clockbl... |
| Description |
Packaged in 16-pin SOIC
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| File Size |
143.82K /
7 Page |
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Integrated Device Techn...
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| Part No. |
ICS670-02
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| OCR Text |
...hase noise, zero delay buffer (zdb) which integrates idt?s proprietary analog/digital phase locked loop (pll) techniques. part of idt?s clockblocks tm family, the part?s zero delay feature means that the rising edge of the input clock ... |
| Description |
Packaged in 16-pin SOIC
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| File Size |
141.95K /
7 Page |
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it Online |
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Price and Availability
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