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  piix4 Datasheet PDF File

For piix4 Found Datasheets File :: 113    Search Time::1.078ms    
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    ICS9248-96

Integrated Circuit Systems
Part No. ICS9248-96
OCR Text ...n. Read-Back will support Intel piix4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic levels. The data byte format is 8 bit bytes....
Description 20-Bit Bus-Interface D-Type Latches With 3-State Outputs 56-SSOP -40 to 85
Frequency Generator & Integrated Buffers for Celeron & PII/III

File Size 385.82K  /  12 Page

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    ICS9248-98 ICS9248YF-98-T AV9248F-98-T

ICST[Integrated Circuit Systems]
Part No. ICS9248-98 ICS9248YF-98-T AV9248F-98-T
OCR Text ...n. Read-Back will support Intel piix4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic levels. The data byte format is 8 bit bytes....
Description Frequency generator and integrated buffer for Celeron and PII/III
Frequency Generator & Integrated Buffers for Celeron & PII/III⑩
16-Bit Transparent D-Type Latches With 3-State Outputs 48-SSOP -40 to 85
Frequency Generator & Integrated Buffers for Celeron & PII/III??/span>

File Size 504.81K  /  15 Page

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    ICS9248-99 ICS9248YF-99 AV9248F-99

ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Part No. ICS9248-99 ICS9248YF-99 AV9248F-99
OCR Text ...n. Read-Back will support Intel piix4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic levels. The data byte format is 8 bit bytes....
Description Frequency generator and integrated buffer for Celeron and PII/III
Frequency Generator & Integrated Buffers for Celeron & PII/III?/a>
Frequency Generator & Integrated Buffers for Celeron & PII/III⑩
16-Bit Transparent D-Type Latches With 3-State Outputs 48-SSOP -40 to 85 频率发生

File Size 448.05K  /  13 Page

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    ICS9248-110 ICS9248YF-110 ICS9248YF-110LF

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Part No. ICS9248-110 ICS9248YF-110 ICS9248YF-110LF
OCR Text ...n. Read-Back will support Intel piix4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic levels. The data byte format is 8 bit bytes....
Description K7; 750/760; System Clock Chip: 90 - 150MHz CPU
AMD-K7TM System Clock Chip
Frequency Generator & Integrated Buffers
115 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48

File Size 150.77K  /  14 Page

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    EVAL-ADM1023

AD[Analog Devices]
Part No. EVAL-ADM1023
OCR Text ...nter port or via the SMBus. The piix4 SMBus Interface is intended for when the ADM1023 is present on the PC's motherboard. While using the evaluation board the Parallel Printer Port Option should always be selected. RY A IN AL IM IC LN R...
Description Evaluation Board for Microprocessor System Temperature Monitor

File Size 278.73K  /  12 Page

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    ICS9250-08 ICS9250YF-08

ICST[Integrated Circuit Systems]
Part No. ICS9250-08 ICS9250YF-08
OCR Text ...n. Read-Back will support Intel piix4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic levels. The data byte format is 8 bit bytes....
Description DS3/E3/STS-1 Transformer
Frequency Generator & Integrated Buffers for Celeron & PII/III⑩

File Size 371.18K  /  15 Page

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    ICS9250-10 ICS9250YF-10

ICST[Integrated Circuit Systems]
Part No. ICS9250-10 ICS9250YF-10
OCR Text ...n. Read-Back will support Intel piix4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic levels. The data byte format is 8 bit bytes....
Description Frequency Timing Generator for Pentium II Systems

File Size 633.15K  /  16 Page

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    ICS9250-13 ICS9250YF-13

ICST[Integrated Circuit Systems]
Part No. ICS9250-13 ICS9250YF-13
OCR Text ...n. Read-Back will support Intel piix4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic levels. The data byte format is 8 bit bytes....
Description LX Single Clock, Supports 50 - 83.3MHz
Frequency Generator & Integrated Buffers for PENTIUM/ProTM

File Size 532.34K  /  15 Page

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    ICS9250-14 ICS9250YF-14-T ICS9250YF-PPP-T ICS9250YF-PPP-T-LF

Thomas
Integrated Device Technology, Inc.
ICST[Integrated Circuit Systems]
Part No. ICS9250-14 ICS9250YF-14-T ICS9250YF-PPP-T ICS9250YF-PPP-T-LF
OCR Text ...n. Read-Back will support Intel piix4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic levels. The data byte format is 8 bit bytes....
Description DS3/E3/STS-1 Transformer 频率的奔腾II系统时序发生
149.69 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 0.300 INCH, SSOP-56
Frequency Generator & Integrated Buffers for Celeron & PII/III
Frequency Timing Generator for Pentium II Systems

File Size 409.63K  /  13 Page

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    ICS9250-16 ICS9250YF-16-T

Integrated Device Technology, Inc.
ICST[Integrated Circuit Systems]
Part No. ICS9250-16 ICS9250YF-16-T
OCR Text ...n. Read-Back will support Intel piix4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic levels. The data byte format is 8 bit bytes....
Description 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 0.300 INCH, SSOP-56
DS3/E3/STS-1 Transformer
CK810E Single Chip Clock, Supports 66 - 150MHz
Frequency Generator & Integrated Buffers for Celeron & PII/III⑩

File Size 537.88K  /  17 Page

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For piix4 Found Datasheets File :: 113    Search Time::1.078ms    
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