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  flow level Datasheet PDF File

For flow level Found Datasheets File :: 17202    Search Time::1.797ms    
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    IDT[Integrated Device Technology]
Part No. IDT74FCT163543PV IDT74FCT163543PA IDT74FCT163543CPV IDT74FCT163543 IDT74FCT163543A IDT74FCT163543APA IDT74FCT163543APF IDT74FCT163543APV IDT74FCT163543C IDT74FCT163543CPA IDT74FCT163543CPF IDT74FCT163543PF
OCR Text ...mit independent control of data flow in either direction. For example, the A-to-B Enable (xCEAB) must be LOW in order to enter data from the...level L = LOW Voltage level X = Don't Care NOTE: 1. This parameter is measured at characterizatio...
Description 3.3V CMOS 16-BIT LATCHED TRANSCEIVER

File Size 103.74K  /  7 Page

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    CY7C09089-12AC CY7C09099 CY7C09099-6AC CY7C09099-9AC CY7C09189-6AC CY7C09099-12AC CY7C09089 CY7C09199-9AI CY7C09089-6AC

CYPRESS[Cypress Semiconductor]
Part No. CY7C09089-12AC CY7C09099 CY7C09099-6AC CY7C09099-9AC CY7C09189-6AC CY7C09099-12AC CY7C09089 CY7C09199-9AI CY7C09089-6AC CY7C09089-7AC CY7C09089-9AC CY7C09099-7AC CY7C09099-9AI CY7C09189 CY7C09189-12AC CY7C09189-7AC CY7C09189-9AC CY7C09199 CY7C09199-12AC CY7C09199-6AC CY7C09199-7AC CY7C09199-9AC
OCR Text ... the same memory location * Six flow-Through/Pipelined devices -- 64K x 8/9 organizations (CY7C09089/189) -- 128K x 8/9 organizations (CY7C0...level) Typical Standby Current for ISB3 (mA) (Both ports CMOS level) Note: 7. This pin is NC for CY...
Description Memory : Dual-Ports
64K/128K X 8/9 SYNCHRONOUS DUAL-PORT STATIC RAM

File Size 331.25K  /  19 Page

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    ST Microelectronics
Part No. TEA3718SDP TEA3718SP TEA3718DP TEA3718SFP
OCR Text ...t sets the direction of current flow through the load. a high level causes current to flow from out a (source) to out b (sink). a schmitt trigger on this input provides good noise immunity and a delay circuit prevents output stage short cir...
Description STEPPER MOTOR DRIVER

File Size 2,874.33K  /  16 Page

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    NB7VQ1006M

ON Semiconductor
Part No. NB7VQ1006M
OCR Text ...ows the in/in inputs to either flow through or bypass the equalizer section. control of the equalizer function is realized by setting eqen;...level standards, such as lvpecl, cml or lvds. this feature provides transmission line termination at...
Description 1.8V / 2.5V 10Gbps Equalizer Receiver

File Size 202.48K  /  10 Page

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    Zarlink Semiconductor
Part No. ZL50130
OCR Text ...customer end services psn bound flow ce bound flow zl50130 ethernet pseudo-wire device packet receive/classifier packet transmit - add laye...level test features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Description 127 Channel Pseudo-Wire Processor

File Size 815.39K  /  58 Page

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    74ALVCH16543 74ALVCH16543DGG ACH16543DGG

NXP Semiconductors N.V.
Part No. 74ALVCH16543 74ALVCH16543DGG ACH16543DGG
OCR Text ...e with ttl levels multibyte ? flow-through pin-out architecture 16-bit transceiver with d-type latch combines 16245 and 16373 type funct...level. function table see note 1. note 1. xx = ab for a-to-b direction, ba for b-to-a direction; h =...
Description Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-SO -40 to 85 16位D登记收发器型;三
16-bit D-type registered transceiver; 3-state

File Size 94.10K  /  20 Page

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    GTLP36T612 GTLP36T612G GTLP36T612GX

Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
Part No. GTLP36T612 GTLP36T612G GTLP36T612GX
OCR Text ...o support wired-or connection s flow through pinout optimizes PCB layout s D-type flip-flop, latch and transparent data paths s A Port sourc...level) B-to-A Output Enable (Active LOW) (LVTTL level) A-to-B Clock/LE Enable (Active LOW) (LVTTL Le...
Description 36-Bit LVTTL/GTLP Universal Bus Transceiver

File Size 77.84K  /  8 Page

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For flow level Found Datasheets File :: 17202    Search Time::1.797ms    
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