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Cypress Semiconductor, Corp.
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| Part No. |
CY2305CSXA-1
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| OCR Text |
...eplacement parts for cy2305 and cy2309. the cy2309c is a low-cost 3.3 v zero delay buffer designed to distribute high speed clocks and is available in a 16-pin soic or tssop package. the cy2305c is an 8-pin version of the cy2309c. it accept... |
| Description |
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C 2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
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| File Size |
424.74K /
17 Page |
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Motorola
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| Part No. |
MPC962305
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| OCR Text |
...ible with the cy2305, cy23s05, cy2309, cy23s09 ? spread spectrum compatible functional description the mpc962309 has two banks of four outputs each, which can be con- trolled by the select inputs as shown in table 3.select input decoding ... |
| Description |
(MPC962305 / MPC962309) Low-Cost 3.3 V Zero Delay Buffer
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| File Size |
480.47K /
12 Page |
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Integrated Device Technology, Inc.
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| Part No. |
MPC962305D-1R2 MPC962305EF-1R2 MPC962309D-1R2 MPC962309EF-1R2
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| OCR Text |
...ible with the cy2305, cy23s05, cy2309, cy23s09 ? spread spectrum compatible ? pb-free packages available functional description the mpc962309 has two banks of four outputs each, which can be controlled by the select inputs as shown in ta... |
| Description |
962305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 0.150 INCH, PLASTIC, MS-012AA, SOIC-8 962305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 0.150 INCH, LEAD FREE, PLASTIC, MS-012AA, SOIC-8 962309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 0.150 INCH, PLASTIC, MS-012AC, SOIC-16 962309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 0.150 INCH, LEAD FREE, PLASTIC, MS-012AC, SOIC-16
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| File Size |
504.37K /
17 Page |
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it Online |
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Freescale Semiconductor, Inc. Integrated Device Technology, Inc.
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| Part No. |
MPC962309D-1R2 MPC962305D-1R2 MPC962305EF-1R2 MPC962309EF-1R2
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| OCR Text |
...ible with the cy2305, cy23s05, cy2309, cy23s09 ? spread spectrum compatible functional description the mpc962309 has two banks of four outputs each, which can be controlled by the select inputs as shown in table 3.select input decoding ... |
| Description |
962309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 0.150 INCH, SOIC-16 962305 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 0.150 INCH, SOIC-8
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| File Size |
81.46K /
6 Page |
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Cypress Semiconductor, Corp.
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| Part No. |
CY23EP09SXI-1T CY23EP09ZXI-1H CY23EP09ZXI-1HT CY23EP09ZXC-1H CY23EP09ZXC-1HT CY23EP09SXC-1H
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| OCR Text |
...ation note entitled ?cy2305 and cy2309 as pci and sdram buffers?. notes 1. weak pull-down. 2. weak pull-down on all outputs. 3. weak pull-ups on these inputs. 4. this output is driven and has an internal feedback for the pll. the load on t... |
| Description |
2.5V or 3.3V, 10-220-MHz, Low Jitter, 9-Output Zero Delay Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 10 MHz to 220 MHz; Outputs: 9; Operating Range: -40 to 85 C 23EP SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 2.5 V or 3.3 V, 10-220 MHz, Low Jitter, 9-Output Zero Delay Buffer 2.5V or 3.3V, 10-220-MHz, Low Jitter, 9-Output Zero Delay Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 10 MHz to 220 MHz; Outputs: 9; Operating Range: 0 to 70 C 23EP SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
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| File Size |
541.97K /
17 Page |
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Intel
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| Part No. |
IXP1240
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| OCR Text |
... clock buffer such as a cypress cy2309. nofix 5. hold time issues for all pci signals (both bused and control) problem: the pci local bus specification, revision 2.2 , specifies a minimum hold time of 0 ns in section 7.6.4.2. the ixp1240 ... |
| Description |
Network Processor
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| File Size |
188.12K /
24 Page |
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it Online |
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