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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0641
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| OCR Text |
zdb/fob w/zo=100ohms 9dbu0641 description the 9dbu0641 is a member of idt's 1.5v ultra-low-power (ulp) pcie family. it has integrated output terminations providing zo=100 ? for direct connection to 100 ? transmission lines. the device... |
| Description |
slew rate for each output
HCSL-compatible differential input
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| File Size |
226.91K /
17 Page |
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Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
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| Part No. |
CY2302 CY2302-01SC CY2302-01SI CY2302SC-1 CY2302SI-1
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| OCR Text |
...e same time as the input to the zdb. In order to achieve this, layout must compensate for trace length between the zdb and the target devices. The method of compensation is described below. External feedback is the trait that allows for thi... |
| Description |
Frequency Multiplier and Zero Delay Buffer 2302 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
CONN MINI D RECPT 68POS VERT T/H
Clocks and Buffers : Clock Distribution
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| File Size |
101.91K /
7 Page |
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Cypress
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| Part No. |
CY2509 CY2510 CY2509_10
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| OCR Text |
...Reference clock provided to the zdb goes HIGH. Synchronizing the other outputs of the zdb to the outputs form the ASIC/Buffer is more complex however, as any propagation delay in the ASIC/Buffer must be accounted for.
Reference Signal Feed... |
| Description |
Spread Aware Ten/Eleven Output Zero Delay Buffer
From old datasheet system
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| File Size |
100.42K /
5 Page |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0631
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| OCR Text |
zdb/fob 9dbu0631 description the 9dbu0631 is a member of idt's 1.5v ultra-low-power (ulp) pcie family. the device has 6 output enables for clock management and 3 selectable smbus addresses. recommended application 1.5v pcie gen1-2-3 zero ... |
| Description |
slew rate for each output
HCSL-compatible differential input
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| File Size |
220.84K /
17 Page |
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it Online |
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Cypress
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| Part No. |
W132 W132-09BX W132-10BX
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| OCR Text |
...Reference clock provided to the zdb goes high. Synchronizing the other outputs of the zdb to the outputs form the ASIC/Buffer is more complex however, as any propagation delay in the ASIC/Buffer must be accounted for.
Reference Signal Feed... |
| Description |
Spread Aware(TM)-designed to work with SSFTG reference signals
Spread Aware?, Ten/Eleven Output Zero Delay Buffer
SPREAD AWARE, TEN/ELEVEN OUTPUT ZERO DELAY BUFFER
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| File Size |
98.98K /
6 Page |
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it Online |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0441
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| OCR Text |
zdb/fob w/zo=100ohms 9dbu0441 description the 9dbu0441 is a member of idt's 1.5v ultra-low-power (ulp) pcie family. it has integrated output terminations providing zo=100 ? for direct connection to 100 ? transmission lines. the device... |
| Description |
slew rate for each output
HCSL-compatible differential input
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| File Size |
190.11K /
16 Page |
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it Online |
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Integrated Device Techn...
Integrated Circuit Syst...
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| Part No. |
9DBU0431
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| OCR Text |
zdb/fob 9dbu0431 description the 9dbu0431 is a member of idt's 1.5v ultra-low-power (ulp) pcie family. the device has 4 output enables for clock management, and 3 selectable smbus addresses. recommended application 1.5v pcie gen1-2-3 zero... |
| Description |
HCSL-compatible differential input
slew rate for each output
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| File Size |
189.07K /
16 Page |
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it Online |
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Cypress Semiconductor, Corp.
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| Part No. |
CY2510ZC-1T CY2509ZC-1T
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| OCR Text |
...e same time as the input to the zdb. in order to achieve this, layout must compensate for trace length between the zdb and the target devices. the method of compensation is described below. external feedback is the trait that allows for thi... |
| Description |
2510 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 4.40 MM, TSSOP-24
2509 SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 4.40 MM, TSSOP-24
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| File Size |
155.87K /
6 Page |
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it Online |
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Integrated Device Techn...
Integrated Circuit Syst...
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| Part No. |
9DBU0241
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| OCR Text |
zdb/fob w/zo=100ohms 9dbu0241 description the 9dbu0241 is a member of idt's 1.5v ultra-low-power (ulp) pcie family. it has integrated output terminations providing zo=100ohms for direct connection to 100ohm transmission lines. the devic... |
| Description |
HCSL-compatible differential input
slew rate for each output
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| File Size |
292.60K /
17 Page |
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it Online |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0231
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| OCR Text |
zdb/fob 9dbu0231 description the 9dbu0231 is a member of idt's 1.5v ultra-low-power (ulp) pcie family. the device has 2 output enables for clock management. recommended application 1.5v pcie gen1-2-3 zero-del ay/fan-out buffer (zdb/fob) o... |
| Description |
slew rate for each output
HCSL compatible differential input
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| File Size |
291.09K /
17 Page |
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it Online |
Download Datasheet |
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Price and Availability
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