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ZARLINK[Zarlink Semiconductor Inc]
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| Part No. |
MT9046AN MT9046
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| OCR Text |
... MUX
MS1 MS2
RST HOLDOVER pcci FLOCK
FS1
FS2
Figure 1 - Functional Block Diagram Zarlink Semiconductor US Patent No. 5,602,884, UK Patent No. 0772912, France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08 1
Zarlink ... |
| Description |
T1/E1 System Synchronizer with Holdover
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| File Size |
300.45K /
34 Page |
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ZARLINK[Zarlink Semiconductor Inc]
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| Part No. |
ZL30409_DDB ZL30409 ZL30409_DDA
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| OCR Text |
... MUX
MS1 MS2
RST HOLDOVER pcci FLOCK
FS1
FS2
Figure 1 - Functional Block Diagram Zarlink Semiconductor US Patent No. 5,602,884, UK Patent No. 0772912, France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08 1
Zarlink ... |
| Description |
Dual reference frequency selectable, 3.3V Digital PLL with multiple clock outputs for T1/E1 and Stratum 4 and 4E applications, with Stratum 3 Holdover
T1/E1 System Synchronizer with Stratum 3 Holdover
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| File Size |
284.56K /
32 Page |
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Zarlink Semiconductor Inc.
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| Part No. |
ZL30409/DDB ZL30409/DDA
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| OCR Text |
...o rsp tsp holdover flock pcci lock virtual reference selected reference dpll
zl30409 data sheet 2 zarlink semiconductor inc. the zl30409 is compliant with telcordia gr-1244-core stratum 4 and etsi ets 300 011 2048 kbit/s interfaces... |
| Description |
T1/E1 System Synchronizer with Stratum 3 Holdover
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| File Size |
290.90K /
32 Page |
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it Online |
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Zarlink
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| Part No. |
ZL30462
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| OCR Text |
... (continued) Pin Number 37 Name pcci Description
Data Sheet
Phase Continuity Control Input (Input). The signal at this pin affects the state changes between Holdover and Normal Modes. The logic level at this input is gated in by the r... |
| Description |
Timing Module
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| File Size |
172.51K /
20 Page |
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it Online |
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