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For jitter-attenuating Found Datasheets File :: 73 Search Time::1.156ms
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				Silicon Laboratories
Part No.	SI5366-B-GQ
OCR Text	...R Description The Si5366 is a jitter-attenuating precision clock multiplier for high-speed communication systems, including SONET OC-48/OC-192, Ethernet, and Fibre Channel. The Si5366 accepts four clock inputs ranging from 8 kHz to 707 MH...
Description	PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
File Size	747.67K / 20 Page	View it Online	Download Datasheet

				Silicon Laboratories
Part No.	SI5323-B-GM
OCR Text	... Description The Si5323 is a jitter-attenuating precision clock multiplier for high-speed communication systems, including SONET OC-48/OC-192, Ethernet, and Fibre Channel. The Si5323 accepts dual clock inputs ranging from 8 kHz to 707 MH...
Description	PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
File Size	631.87K / 16 Page	View it Online	Download Datasheet

				SILABS[Silicon Laboratories]
Part No.	SI5326C-B-GM SI5326 SI5326A-B-GM SI5326B-B-GM
OCR Text	JITTER ATTENUATOR Description The Si5326 is a jitter-attenuating precision clock multiplier for applications requiring sub 1 ps jitter performance. The Si5326 accepts dual clock inputs ranging from 2 kHz to 710 MHz and generates two clock...
Description	ANY-RATE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
File Size	603.36K / 16 Page	View it Online	Download Datasheet

				Wolfson Microelectronics plc
Part No.	WM8804 WM8804GEDS WM8804GEDSR
OCR Text	...ster clock is used to allow low jitter recovery of S/PDIF supplied master clocks. Generation of all typically used audio clocks is possible ...attenuating PLL with low intrinsic period jitter of 50 ps RMS. S/PDIF recovered clock using PLL, or ...
Description	1:1 Digital Interface Transceiver with PLL
File Size	683.06K / 66 Page	View it Online	Download Datasheet

				Wolfson Microelectronics plc
Part No.	WM8805 WM8805GEDR WM8805GEDS
OCR Text	...ster clock is used to allow low jitter recovery of S/PDIF supplied master clocks. Generation of all typically used audio clocks is possible ...attenuating PLL with low intrinsic period jitter of 50 ps RMS. S/PDIF recovered clock using PLL, or ...
Description	8:1 Digital Interface Transceiver with PLL
File Size	838.16K / 65 Page	View it Online	Download Datasheet

				Integrated Device Technology, Inc. Integrated Circuit Systems
Part No.	ICS9212-13 ICS9212YF-13LF
OCR Text	...aintained while attenuating the jitter of the reference signal. Features * * * * * Compatible with all Direct RambusTM based IC s Up to 600 MHz differential clock source for direct RambusTM memory system Cycle to cycle jitter is less th...
Description	533.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO24 0.150 INCH, SSOP-24 Direct Rambus Clock Generator Direct Rambus⑩ Clock Generator
File Size	157.17K / 7 Page	View it Online	Download Datasheet

				http:// Integrated Device Technology
Part No.	ICS9DB20206 ICS9DB202 ICS9DB202CF ICS9DB202CFLF ICS9DB202CFLFT ICS9DB202CFT ICS9DB202CG ICS9DB202CGL ICS9DB202CGLF ICS9DB202CGLFT ICS9DB202CGT
OCR Text	JITTER ATTENUATOR ICS9DB202 GENERAL DESCRIPTION The ICS9DB202 is a high perfromance 1-to-2 Differential-to-HCSL Jitter Attenuator des...attenuating device may be necessary in order to reduce high frequency random and deterministic jitte...
Description	PCI EXPRESS JITTER ATTENUATOR
File Size	663.99K / 13 Page	View it Online	Download Datasheet

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