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Cypress Semiconductor Corp.
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| Part No. |
w532
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| OCR Text |
w532
Frequency Multiplying, Peak Reducing EMI Solution
Features
* Cypress PREMISTM family offering * Generates an EMI optimized clockin...suppressed)
X1 X2 AVDD *OR1 NC AGND ^OR2 *SSON#
1 2 3 4 5 6
16 15 14 13 12 11 10 9
VDD G... |
| Description |
Frequency Multiplying, Peak Reducing EMI Solution(频率倍增, 峰值减小EMI解决方案)
Clocks and Buffers
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| File Size |
113.54K /
8 Page |
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it Online |
Download Datasheet
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SMSC, Corp.
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| Part No. |
w181-01X
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| OCR Text |
...25 c p d power dissipation 0.5 w dc electrical characteristics : 0 c < t a < 70 c, v dd = 3.3v 5% parameter description test condition min. typ. max. unit i dd supply current 18 32 ma t on power-up time first locked clock cycle after ... |
| Description |
MISCELLANEOUS CLOCK GENERATOR|CMOS|TSSOP|14PIN|PLASTIC 杂项时钟发生器|的CMOS | TSSOP封装| 14PIN |塑料
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| File Size |
159.27K /
10 Page |
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it Online |
Download Datasheet |
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Philips
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| Part No. |
74HCT4046AN 74HCT4046ADB 74HCT4046AD 74HC4046APw
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| OCR Text |
...ynamic power dissipation (PD in w): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz. fo = output frequency in MHz. CL = output load capacitance in pF. VCC = supply voltage in V. (CL x VCC2 x fo) = sum of outputs... |
| Description |
74HC/HCT4046A; Phase-locked-loop with VCO
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| File Size |
439.64K /
35 Page |
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it Online |
Download Datasheet |
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Price and Availability
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