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Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
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| Part No. |
CY39050Z208-83NTC CY3930V388-83NTC CY39050V484-83NTC CY39050V208-83NTC CY3930V676-83NTC CY3930V484-83NTC CY3930V256-83NTC CY3930Z208-83NTC CY39050V676-83NTC CY39030Z484-83NTC CY39050Z388-83NTC CY39030Z256-83NTC CY39050Z256-83NTC CY39050Z484-83NTC CY39030Z388-83NTC CY3930V484-125MGI CY39030Z484-125MBI CY39030Z484-125MGC CY39050V256-83NTC CY39050V484-125MGC CY3930V484-125MGC CY39030Z484-125MGI CY39050Z676-83NTC CY3930V208-83NTC CY39050V484-125MBC CY39050V388-83NTC CY39030Z676-83NTC CY39050V484-125MBI CY39030Z484-125MBC CY3930V208-83NI CY3930Z208-83NI CY39030Z676-233NTC CY39030Z676-200NTC CY39030Z676-200NTI CY39030Z676-233NTI CY39165Z676-200NTI CY39165Z676-233NTI CY39050V208-200MGI CY39050V208-200MGC CY39050Z208-125MGC CY39050V208-233MGC CY39050V208-233MGI CY39050V208-83MGC CY39050V208-83MGI CY39050V208-233BBC CY39050V208-233BBI CY39050V208-233BGC CY39050V208-233MBI CY39050V388-125BBC CY39050V208-233BGI CY39050V208-233MBC CY39050V208-233NC CY39050V388-125BBI CY39050V388-125BGC CY39050V388-125BGI CY39030Z388-233NI CY39050V388-233NI CY39050V484-233NI CY39030Z484-200MBI CY3930V388-233NI CY39030Z484-200MGI CY39050Z388-233NI CY39050Z676-233NI CY39030Z484-200MGC CY39030Z676-233NI CY39050Z48
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| OCR Text |
...1] macrocells cluster memory (kbits) channel memory (kbits) maximum i/o pins f max2 (mhz) speed-t pd pin-to-pin (ns) standby i cc [...s peed bins on page 38. 4. self-boot solution integrates the boot prom (flash memory) with delta39k ... |
| Description |
Evaluation Board for ADXL346 - 3-Axis, ±2 g/±4 g/±8 g/±16 g Ultralow Power Digital Accelerometer
50 MHz to 4.0 GHz RF/IF Gain Block; Package: 3-pin; Temperature Range: -40°C to 125°C
Triple skew-Compensating Video Delay Line with Analog and Digital Control; Package: 32-LFCsP (5x5mm w/3.5mm exposed pad); Temperature Range: -40°C to 125°C
3-Axis, ±2 g/±4 g/±8 g/±16 g Ultralow Power Digital Accelerometer; Package: 16-LGA; Temperature Range: -40°C to 125°C
CPLDs at FPGA Densities CPLD器件在FPGA的密
CPLDs at FPGA Densities LOADABLE PLD, 8.5 ns, PBGA676
CPLDs at FPGA Densities LOADABLE PLD, 7.2 ns, PQFP208
CPLDs at FPGA Densities LOADABLE PLD, 7.2 ns, PBGA256
CPLDs at FPGA Densities LOADABLE PLD, 10 ns, PBGA388
CPLDs at FPGA Densities LOADABLE PLD, 15 ns, PQFP208
CPLDs at FPGA Densities LOADABLE PLD, 15 ns, PBGA256
CPLDs at FPGA Densities LOADABLE PLD, 15 ns, PBGA484
CPLDs at FPGA Densities LOADABLE PLD, 15 ns, PBGA676
CPLDs at FPGA Densities LOADABLE PLD, 10 ns, PBGA676
CPLDs at FPGA Densities LOADABLE PLD, 10 ns, PBGA256
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| File Size |
1,243.04K /
86 Page |
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Download Datasheet
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| Part No. |
AGL030V5-FVQG100 AGL060V2-FFG144 AGL015V5-FQN68
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| OCR Text |
...illion system gates ? up to 144 kbits of true dual-port sram ? up to 300 user i/os reprogrammable flash technology ? 130-nm, 7-layer metal, ...s are based only on simulation. the characteristics provided for the ?f sp eed grade are subject to ... |
| Description |
FPGA, 768 CLBs, 30000 GATEs, 108 MHz, PQFP100
FPGA, 1536 CLBs, 60000 GATEs, 108 MHz, PBGA144
FPGA, 384 CLBs, 15000 GATEs, QCC68
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| File Size |
6,519.23K /
216 Page |
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it Online |
Download Datasheet |
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