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ONSEMI[ON Semiconductor]
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| Part No. |
NCP5214AMNR2G NCP5214A
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| OCR Text |
... monitor tracks VDDQ output and notifies the user whether the VDDQ output is within target range. Protective features include soft-start circuitries, undervoltage monitoring of supply voltage, VDDQ overcurrent protection, VDDQ overvoltage a... |
| Description |
2−in−1 Notebook DDR Power Controller
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| File Size |
360.57K /
31 Page |
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it Online |
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NEC[NEC]
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| Part No. |
UPD98409GN-LMU UPD98409
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| OCR Text |
.../Rx Cell Available. This signal notifies the PD98409 that there is no cell data to be transferred in the receive FIFO and that no receive data can be supplied to the PHY device. When the UTOPIA interface is in the octet-level handshake mode... |
| Description |
ATM LIGHT SAR CONTROLLER
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| File Size |
394.04K /
36 Page |
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it Online |
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XICOR[Xicor Inc.]
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| Part No. |
X1243V8 X1243 X1243S8 X1243S8I
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| OCR Text |
...rupt signal output. This signal notifies a host processor that alarm has occurred and requests action. It is an open drain active LOW output. X1, X2 The X1 and X2 pins are the input and output, respectively, of an inverting amplifier that c... |
| Description |
Real Time Clock/Calendar/Alarm with EEPROM
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| File Size |
90.69K /
18 Page |
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it Online |
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INTERSIL[Intersil Corporation]
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| Part No. |
X1286V14I X1286 X1286A8 X1286A8I X1286V14
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| OCR Text |
...s interrupt output, this signal notifies a host processor that an alarm has occurred and an action is required. It is an active LOW output. The control bits for this function are FO1 and FO0 and are found in address 0011h of the Clock Contr... |
| Description |
Intersil Real Time Clock/Calendar/CPU Supervisor with EEPROM X1286
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| File Size |
351.42K /
25 Page |
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it Online |
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