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    Philips
Part No. N74F1779 N74F1779D N74F1779N
OCR Text ... rising edge of the clock. When cet is High, the data outputs are held in their current state and TC is held High. the TC output is not recommended for use as a clock or asynchronous reset due to the possibility of decoding spikes. The 74F1...
Description 8-bit bidirectional binary counter -State

File Size 110.63K  /  13 Page

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    74F162A 74F162ASC 74F162APC 74F162ASCX

FAIRCHILD[Fairchild Semiconductor]
Part No. 74F162A 74F162ASC 74F162APC 74F162ASCX
OCR Text ...ing/Fan Out U.L. Pin Names CEP cet CP SR P0-P3 PE Q0-Q3 TC Description Count Enable Parallel Input Count Enable Trickle Input Clock Pulse Input (Active Rising Edge) Synchronous Reset Input (Active LOW) Parallel Data Inputs Parallel Enable ...
Description Synchronous Presettable BCD Decade Counter (Synchronous Reset)

File Size 69.22K  /  7 Page

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    74LVC169PWDH 74LVC169_2 74LVC169 74LVC169D 74LVC169DB 74LVC169PW

NXP Semiconductors
PHILIPS[Philips Semiconductors]
Part No. 74LVC169PWDH 74LVC169_2 74LVC169 74LVC169D 74LVC169DB 74LVC169PW
OCR Text ...at count enable inputs (CEP and cet). A low level at the master reset input (MR) sets all four outputs of the flip-flops (Q0 to Q3) to LOW level after the next positive-going transition on the clock (CP) input (provided that the set-up and ...
Description From old datasheet system
Presettable synchronous 4-bit up/down binary counter

File Size 124.08K  /  14 Page

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    IDT
Part No. IDT5962-9221004MEA IDT5962-9221006M2A IDT5962-9221002MEA
OCR Text ... a detail a detail a pe cep cet cp sr q 0 q 1 q 2 q 3 q 0 detail a p 0 p 1 p 2 p 3 tc cp military and industrial temperature ranges 2 idt54/74fct163t/at/ct fast cmos synchronous presettable binary counter pin configuration symbol desc...
Description Synchronous Presettable Binary Counter

File Size 90.80K  /  7 Page

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    Philips
Part No. 74HC163D 74HC163PW 74HC163DB 74HC163N 74HCT163N 74HCT163PW
OCR Text ...at count enable inputs (cep and cet). for the 163 the clear function is synchronous. a low level at the master reset input ( mr) sets all four outputs of the flip-flops (q 0 to q 3 ) to low level after the next positive-going transition on...
Description 74HC/HCT163; Presettable synchronous 4-bit binary counter; synchronous reset

File Size 80.18K  /  11 Page

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